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[24.6.151.244]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-22978771cf7sm88708495ad.249.2025.04.07.19.52.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 07 Apr 2025 19:52:53 -0700 (PDT) Date: Mon, 7 Apr 2025 19:52:50 -0700 From: Joe Damato To: Michael Klein Cc: Andrew Lunn , Heiner Kallweit , Russell King , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [RESEND net-next v5 1/4] net: phy: realtek: Group RTL82* macro definitions Message-ID: Mail-Followup-To: Joe Damato , Michael Klein , Andrew Lunn , Heiner Kallweit , Russell King , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , netdev@vger.kernel.org, linux-kernel@vger.kernel.org References: <20250407182155.14925-1-michael@fossekall.de> <20250407182155.14925-2-michael@fossekall.de> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20250407182155.14925-2-michael@fossekall.de> On Mon, Apr 07, 2025 at 08:21:40PM +0200, Michael Klein wrote: > Group macro definitions by chip number in lexicographic order. > > Signed-off-by: Michael Klein > --- > drivers/net/phy/realtek/realtek_main.c | 30 +++++++++++++------------- > 1 file changed, 15 insertions(+), 15 deletions(-) > > diff --git a/drivers/net/phy/realtek/realtek_main.c b/drivers/net/phy/realtek/realtek_main.c > index 893c82479671..b27c0f995e56 100644 > --- a/drivers/net/phy/realtek/realtek_main.c > +++ b/drivers/net/phy/realtek/realtek_main.c > @@ -17,6 +17,15 @@ > > #include "realtek.h" > > +#define RTL8201F_ISR 0x1e > +#define RTL8201F_ISR_ANERR BIT(15) > +#define RTL8201F_ISR_DUPLEX BIT(13) > +#define RTL8201F_ISR_LINK BIT(11) > +#define RTL8201F_ISR_MASK (RTL8201F_ISR_ANERR | \ > + RTL8201F_ISR_DUPLEX | \ > + RTL8201F_ISR_LINK) > +#define RTL8201F_IER 0x13 If sorting lexicographically, wouldn't RTL8201F_IER come before RTL8201F_ISR ? > #define RTL821x_PHYSR 0x11 > #define RTL821x_PHYSR_DUPLEX BIT(13) > #define RTL821x_PHYSR_SPEED GENMASK(15, 14) > @@ -31,6 +40,10 @@ > #define RTL821x_EXT_PAGE_SELECT 0x1e > #define RTL821x_PAGE_SELECT 0x1f > > +#define RTL8211E_CTRL_DELAY BIT(13) > +#define RTL8211E_TX_DELAY BIT(12) > +#define RTL8211E_RX_DELAY BIT(11) Maybe I'm reading this wrong but these don't seem sorted lexicographically ?