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charset=us-ascii Content-Disposition: inline In-Reply-To: <20240219100555.7220-5-mateusz.polchlopek@intel.com> Mon, Feb 19, 2024 at 11:05:57AM CET, mateusz.polchlopek@intel.com wrote: >From: Lukasz Czapnik > >It was observed that Tx performance was inconsistent across all queues >and/or VSIs and that it was directly connected to existing 9-layer >topology of the Tx scheduler. > >Introduce new private devlink param - tx_scheduling_layers. This parameter >gives user flexibility to choose the 5-layer transmit scheduler topology >which helps to smooth out the transmit performance. > >Allowed parameter values are 5 and 9. > >Example usage: > >Show: >devlink dev param show pci/0000:4b:00.0 name tx_scheduling_layers >pci/0000:4b:00.0: > name tx_scheduling_layers type driver-specific > values: > cmode permanent value 9 > >Set: >devlink dev param set pci/0000:4b:00.0 name tx_scheduling_layers value 5 >cmode permanent This is kind of proprietary param similar to number of which were shot down for mlx5 in past. Jakub? Also, given this is apparently nvconfig configuration, there could be probably more suitable to use some provisioning tool. This is related to the mlx5 misc driver. Until be figure out the plan, this has my nack: NAcked-by: Jiri Pirko