From: Ido Schimmel <idosch@nvidia.com>
To: Przemek Kitszel <przemyslaw.kitszel@intel.com>, helgaas@kernel.org
Cc: Petr Machata <petrm@nvidia.com>,
mlxsw@nvidia.com, linux-pci@vger.kernel.org,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
netdev@vger.kernel.org
Subject: Re: [PATCH net-next 3/3] mlxsw: pci: Lock configuration space of upstream bridge during reset
Date: Wed, 3 Jul 2024 17:42:05 +0300 [thread overview]
Message-ID: <ZoVjPb_OwbKh7kHu@shredder.lan> (raw)
In-Reply-To: <79ee5354-1d70-4059-aa9d-9d9ffa18689a@intel.com>
On Tue, Jul 02, 2024 at 09:35:50AM +0200, Przemek Kitszel wrote:
> On 7/1/24 18:41, Petr Machata wrote:
> > From: Ido Schimmel <idosch@nvidia.com>
> >
> > The driver triggers a "Secondary Bus Reset" (SBR) by calling
> > __pci_reset_function_locked() which asserts the SBR bit in the "Bridge
> > Control Register" in the configuration space of the upstream bridge for
> > 2ms. This is done without locking the configuration space of the
> > upstream bridge port, allowing user space to access it concurrently.
>
> This means your patch is a bugfix.
>
> >
> > Linux 6.11 will start warning about such unlocked resets [1][2]:
> >
> > pcieport 0000:00:01.0: unlocked secondary bus reset via: pci_reset_bus_function+0x51c/0x6a0
> >
> > Avoid the warning by locking the configuration space of the upstream
> > bridge prior to the reset and unlocking it afterwards.
>
> You are not avoiding the warning but protecting concurrent access,
> please add a Fixes tag.
The patch that added the missing lock in PCI core was posted without a
Fixes tag and merged as part of the 6.10 PR. See commit 7e89efc6e9e4
("PCI: Lock upstream bridge for pci_reset_function()").
I don't see a good reason for root to poke in the configuration space of
the upstream bridge during SBR, but AFAICT the worst that can happen is
that reset will fail and while it is a bug, it is not a regression.
Bjorn, do you see a reason to post this as a fix?
Thanks
>
> >
> > [1] https://lore.kernel.org/all/171711746953.1628941.4692125082286867825.stgit@dwillia2-xfh.jf.intel.com/
> > [2] https://lore.kernel.org/all/20240531213150.GA610983@bhelgaas/
> >
> > Cc: linux-pci@vger.kernel.org
> > Signed-off-by: Ido Schimmel <idosch@nvidia.com>
> > Signed-off-by: Petr Machata <petrm@nvidia.com>
next prev parent reply other threads:[~2024-07-03 14:42 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-07-01 16:41 [PATCH net-next 0/3] mlxsw: Improvements Petr Machata
2024-07-01 16:41 ` [PATCH net-next 1/3] mlxsw: Warn about invalid accesses to array fields Petr Machata
2024-07-02 7:08 ` Przemek Kitszel
2024-07-03 12:40 ` Ido Schimmel
2024-07-08 9:45 ` Petr Machata
2024-07-01 16:41 ` [PATCH net-next 2/3] mlxsw: core_thermal: Report valid current state during cooling device registration Petr Machata
2024-07-02 7:27 ` Przemek Kitszel
2024-07-09 16:06 ` Rafael J. Wysocki
2024-07-01 16:41 ` [PATCH net-next 3/3] mlxsw: pci: Lock configuration space of upstream bridge during reset Petr Machata
2024-07-02 7:35 ` Przemek Kitszel
2024-07-03 14:42 ` Ido Schimmel [this message]
2024-07-12 21:21 ` Bjorn Helgaas
2024-07-14 11:29 ` Ido Schimmel
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