From: "Russell King (Oracle)" <linux@armlinux.org.uk>
To: Jon Hunter <jonathanh@nvidia.com>
Cc: Revanth Kumar Uppala <ruppala@nvidia.com>,
"andrew@lunn.ch" <andrew@lunn.ch>,
"hkallweit1@gmail.com" <hkallweit1@gmail.com>,
"netdev@vger.kernel.org" <netdev@vger.kernel.org>,
"linux-tegra@vger.kernel.org" <linux-tegra@vger.kernel.org>
Subject: Re: [PATCH 3/4] net: phy: aquantia: Poll for TX ready at PHY system side
Date: Mon, 29 Jul 2024 11:47:23 +0100 [thread overview]
Message-ID: <ZqdzOxYJiRyft1Nh@shell.armlinux.org.uk> (raw)
In-Reply-To: <bb949d68-3229-45b8-964c-54ccf812f6f8@nvidia.com>
On Fri, Jul 19, 2024 at 02:27:24PM +0100, Jon Hunter wrote:
> Hi Russell,
>
> On 24/07/2023 12:57, Russell King (Oracle) wrote:
> > On Mon, Jul 24, 2023 at 11:29:33AM +0000, Revanth Kumar Uppala wrote:
> > > > -----Original Message-----
> > > > From: Russell King <linux@armlinux.org.uk>
> > > > Sent: Wednesday, June 28, 2023 7:04 PM
> > > > To: Revanth Kumar Uppala <ruppala@nvidia.com>
> > > > Cc: andrew@lunn.ch; hkallweit1@gmail.com; netdev@vger.kernel.org; linux-
> > > > tegra@vger.kernel.org
> > > > Subject: Re: [PATCH 3/4] net: phy: aquantia: Poll for TX ready at PHY system side
> > > >
> > > > External email: Use caution opening links or attachments
> > > >
> > > >
> > > > On Wed, Jun 28, 2023 at 06:13:25PM +0530, Revanth Kumar Uppala wrote:
> > > > > + /* Lane bring-up failures are seen during interface up, as interface
> > > > > + * speed settings are configured while the PHY is still initializing.
> > > > > + * To resolve this, poll until PHY system side interface gets ready
> > > > > + * and the interface speed settings are configured.
> > > > > + */
> > > > > + ret = phy_read_mmd_poll_timeout(phydev, MDIO_MMD_PHYXS,
> > > > MDIO_PHYXS_VEND_IF_STATUS,
> > > > > + val, (val & MDIO_PHYXS_VEND_IF_STATUS_TX_READY),
> > > > > + 20000, 2000000, false);
> > > >
> > > > What does this actually mean when the condition succeeds? Does it mean that
> > > > the system interface is now fully configured (but may or may not have link)?
> > > Yes, your understanding is correct.
> > > It means that the system interface is now fully configured and has the link.
> >
> > As you indicate that it also indicates that the system interface has
> > link, then you leave me no option but to NAK this patch, sorry. The
> > reason is:
> >
> > > > ... If it doesn't succeed because the system
> > > > interface doesn't have link, then that would be very bad, because _this_ function
> > > > needs to return so the MAC side can then be configured to gain link with the PHY
> > > > with the appropriate link parameters.
> >
> > Essentially, if the PHY changes its host interface because the media
> > side has changed, we *need* the read_status() function to succeed, tell
> > us that the link is up, and what the parameters are for the media side
> > link _and_ the host side interface.
> >
> > At this point, if the PHY has changed its host-side interface, then the
> > link with the host MAC will be _down_ because the MAC driver is not yet
> > aware of the new parameters for the link. read_status() has to succeed
> > and report the new parameters to the MAC so that the MAC (or phylink)
> > can reconfigure the MAC and PCS for the PHY's new operating mode.
> >
> > Sorry, but NAK.
>
>
> Apologies for not following up before on this and now that is has been a
> year I am not sure if it is even appropriate to dig this up as opposed to
> starting a new thread completely.
>
> However, I want to resume this conversation because we have found that this
> change does resolve a long-standing issue where we occasionally see our
> ethernet controller fail to get an IP address.
>
> I understand that your objection to the above change is that (per Revanth's
> feedback) this change assumes interface has the link. However, looking at
> the aqr107_read_status() function where this change is made the function has
> the following ...
>
> static int aqr107_read_status(struct phy_device *phydev)
> {
> int val, ret;
>
> ret = aqr_read_status(phydev);
> if (ret)
> return ret;
>
> if (!phydev->link || phydev->autoneg == AUTONEG_DISABLE)
> return 0;
>
>
> So my understanding is that if we don't have the link, then the above test
> will return before we attempt to poll the TX ready status. If that is the
> case, then would the change being proposed be OK?
Here, phydev->link will be the _media_ side link. This is fine - if the
media link is down, there's no point doing anything further. However,
if the link is up, then we need the PHY to update phydev->interface
_and_ report that the link was up (phydev->link is true).
When that happens, the layers above (e.g. phylib, phylink, MAC driver)
then know that the _media_ side interface has come up, and they also
know the parameters that were negotiated. They also know what interface
mode the PHY is wanting to use.
At that point, the MAC driver can then reconfigure its PHY facing
interface according to what the PHY is using. Until that point, there
is a very real chance that the PHY <--> MAC connection will remain
_down_.
The patch adds up to a _two_ _second_ wait for the PHY <--> MAC
connection to come up before aqr107_read_status() will return. This
is total nonsense - because waiting here means that the MAC won't
get the notification of which interface mode the PHY is expecting
to use, therefore the MAC won't configure its PHY facing hardware
for that interface mode, and therefore the PHY <--> MAC connection
will _not_ _come_ _up_.
You can not wait for the PHY <--> MAC connection to come up in the
phylib read_status method. Ever.
This is non-negotiable because it is just totally wrong to do this
and leads to pointless two second delays.
--
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTP is here! 80Mbps down 10Mbps up. Decent connectivity at last!
next prev parent reply other threads:[~2024-07-29 10:47 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20230628124326.55732-1-ruppala@nvidia.com>
2023-06-28 13:30 ` [PATCH 1/4] net: phy: aquantia: Enable Tx/Rx pause frame support in aquantia PHY Russell King (Oracle)
[not found] ` <ce4c10b5-c2cf-489d-b096-19b5bcd8c49e@lunn.ch>
2023-07-24 11:29 ` Revanth Kumar Uppala
2023-07-24 11:47 ` Russell King (Oracle)
[not found] ` <20230628124326.55732-3-ruppala@nvidia.com>
2023-06-28 13:33 ` [PATCH 3/4] net: phy: aquantia: Poll for TX ready at PHY system side Russell King (Oracle)
2023-07-24 11:29 ` Revanth Kumar Uppala
2023-07-24 11:57 ` Russell King (Oracle)
2024-07-19 13:27 ` Jon Hunter
2024-07-29 10:47 ` Russell King (Oracle) [this message]
2024-07-30 9:36 ` Jon Hunter
2024-07-30 9:41 ` Russell King (Oracle)
2024-07-30 10:02 ` Jon Hunter
2024-07-30 11:12 ` Russell King (Oracle)
2024-07-30 12:25 ` Jon Hunter
2024-09-24 10:33 ` Jon Hunter
[not found] ` <20230628124326.55732-4-ruppala@nvidia.com>
2023-06-28 13:43 ` [PATCH 4/4] net: phy: aqr113c: Enable Wake-on-LAN (WOL) Russell King (Oracle)
2023-07-24 11:29 ` Revanth Kumar Uppala
2023-07-24 12:29 ` Russell King (Oracle)
[not found] ` <c1aedb1e-e750-40ce-a19a-dfb21e2a971f@lunn.ch>
2023-07-24 11:30 ` Revanth Kumar Uppala
2023-06-28 13:46 ` [PATCH 1/4] net: phy: aquantia: Enable Tx/Rx pause frame support in aquantia PHY Russell King (Oracle)
[not found] ` <20230628124326.55732-2-ruppala@nvidia.com>
[not found] ` <57493101-413c-4f68-a064-f25e75fc2783@lunn.ch>
2023-07-24 11:29 ` [PATCH 2/4] net: phy: aquantia: Enable MAC Controlled EEE Revanth Kumar Uppala
2023-07-24 11:52 ` Russell King (Oracle)
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