* [PATCH net v3 0/2] Fix AQR PMA capabilities @ 2024-09-25 23:01 Abhishek Chauhan 2024-09-25 23:01 ` [PATCH net v3 1/2] net: phy: aquantia: AQR115c fix up " Abhishek Chauhan 2024-09-25 23:01 ` [PATCH net v3 2/2] net: phy: aquantia: remove usage of phy_set_max_speed Abhishek Chauhan 0 siblings, 2 replies; 7+ messages in thread From: Abhishek Chauhan @ 2024-09-25 23:01 UTC (permalink / raw) To: David S. Miller, Eric Dumazet, Jakub Kicinski, Paolo Abeni, netdev, linux-kernel, Andrew Halaney, Russell King (Oracle), Andrew Lunn, Heiner Kallweit, Bartosz Golaszewski, linux-tegra@vger.kernel.org, Brad Griffis, Vladimir Oltean, Jon Hunter, Maxime Chevallier, Przemek Kitszel Cc: kernel Patch 1:- AQR115c reports incorrect PMA capabilities which includes 10G/5G and also incorrectly disables capabilities like autoneg and 10Mbps support. AQR115c as per the Marvell databook supports speeds up to 2.5Gbps with autonegotiation. AQR115c also support 2500BaseX Patch 2:- Remove the use of phy_set_max_speed in phy driver as the function is mainly used in MAC driver to set the max speed. Instead use get_features to fix up Phy PMA capabilities for AQR111, AQR111B0, AQR114C and AQCS109 Abhishek Chauhan (2): net: phy: aquantia: AQR115c fix up PMA capabilities net: phy: aquantia: remove usage of phy_set_max_speed drivers/net/phy/aquantia/aquantia_main.c | 73 +++++++++++++++++++----- 1 file changed, 58 insertions(+), 15 deletions(-) -- 2.25.1 ^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH net v3 1/2] net: phy: aquantia: AQR115c fix up PMA capabilities 2024-09-25 23:01 [PATCH net v3 0/2] Fix AQR PMA capabilities Abhishek Chauhan @ 2024-09-25 23:01 ` Abhishek Chauhan 2024-09-26 6:42 ` Maxime Chevallier 2024-09-26 11:45 ` Russell King (Oracle) 2024-09-25 23:01 ` [PATCH net v3 2/2] net: phy: aquantia: remove usage of phy_set_max_speed Abhishek Chauhan 1 sibling, 2 replies; 7+ messages in thread From: Abhishek Chauhan @ 2024-09-25 23:01 UTC (permalink / raw) To: David S. Miller, Eric Dumazet, Jakub Kicinski, Paolo Abeni, netdev, linux-kernel, Andrew Halaney, Russell King (Oracle), Andrew Lunn, Heiner Kallweit, Bartosz Golaszewski, linux-tegra@vger.kernel.org, Brad Griffis, Vladimir Oltean, Jon Hunter, Maxime Chevallier, Przemek Kitszel Cc: kernel AQR115c reports incorrect PMA capabilities which includes 10G/5G and also incorrectly disables capabilities like autoneg and 10Mbps support. AQR115c as per the Marvell databook supports speeds up to 2.5Gbps with autonegotiation. Fixes: 0ebc581f8a4b ("net: phy: aquantia: add support for aqr115c") Link: https://lore.kernel.org/all/20240913011635.1286027-1-quic_abchauha@quicinc.com/T/ Signed-off-by: Abhishek Chauhan <quic_abchauha@quicinc.com> --- Changes since v2 1. seperate out the changes into two different patches. 3. use phy_gbit_features instead of initializing each and every link mode bits. 4. write seperate functions for 2.5Gbps supported phy 5. remove FIBRE bit which was introduced in patch 1 Changes since v1 1. remove usage of phy_set_max_speed in the aquantia driver code. 2. Introduce aqr_custom_get_feature which checks for the phy id and takes necessary actions based on max_speed supported by the phy 3. remove aqr111_config_init as it is just a wrapper function. drivers/net/phy/aquantia/aquantia_main.c | 28 ++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/drivers/net/phy/aquantia/aquantia_main.c b/drivers/net/phy/aquantia/aquantia_main.c index e982e9ce44a5..88ba12aaf6e0 100644 --- a/drivers/net/phy/aquantia/aquantia_main.c +++ b/drivers/net/phy/aquantia/aquantia_main.c @@ -767,6 +767,33 @@ static int aqr111_config_init(struct phy_device *phydev) return aqr107_config_init(phydev); } +static int aqr115c_get_features(struct phy_device *phydev) +{ + int ret; + __ETHTOOL_DECLARE_LINK_MODE_MASK(supported) = { 0, }; + + /* Normal feature discovery */ + ret = genphy_c45_pma_read_abilities(phydev); + if (ret) + return ret; + + /* PHY FIXUP */ + /* Although the PHY sets bit 12.18.19.48, it does not support 5G/10G modes */ + linkmode_clear_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, phydev->supported); + linkmode_clear_bit(ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, phydev->supported); + linkmode_clear_bit(ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, phydev->supported); + linkmode_clear_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, phydev->supported); + + /* Phy supports Speeds up to 2.5G with Autoneg though the phy PMA says otherwise */ + linkmode_copy(supported, phy_gbit_features); + linkmode_set_bit(ETHTOOL_LINK_MODE_2500baseX_Full_BIT, supported); + linkmode_set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, supported); + + linkmode_or(phydev->supported, supported, phydev->supported); + + return 0; +} + static struct phy_driver aqr_driver[] = { { PHY_ID_MATCH_MODEL(PHY_ID_AQ1202), @@ -1036,6 +1063,7 @@ static struct phy_driver aqr_driver[] = { .get_sset_count = aqr107_get_sset_count, .get_strings = aqr107_get_strings, .get_stats = aqr107_get_stats, + .get_features = aqr115c_get_features, .link_change_notify = aqr107_link_change_notify, .led_brightness_set = aqr_phy_led_brightness_set, .led_hw_is_supported = aqr_phy_led_hw_is_supported, -- 2.25.1 ^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH net v3 1/2] net: phy: aquantia: AQR115c fix up PMA capabilities 2024-09-25 23:01 ` [PATCH net v3 1/2] net: phy: aquantia: AQR115c fix up " Abhishek Chauhan @ 2024-09-26 6:42 ` Maxime Chevallier 2024-09-27 0:17 ` Abhishek Chauhan (ABC) 2024-09-26 11:45 ` Russell King (Oracle) 1 sibling, 1 reply; 7+ messages in thread From: Maxime Chevallier @ 2024-09-26 6:42 UTC (permalink / raw) To: Abhishek Chauhan Cc: David S. Miller, Eric Dumazet, Jakub Kicinski, Paolo Abeni, netdev, linux-kernel, Andrew Halaney, Russell King (Oracle), Andrew Lunn, Heiner Kallweit, Bartosz Golaszewski, linux-tegra@vger.kernel.org, Brad Griffis, Vladimir Oltean, Jon Hunter, Przemek Kitszel, kernel Hello, On Wed, 25 Sep 2024 16:01:28 -0700 Abhishek Chauhan <quic_abchauha@quicinc.com> wrote: > AQR115c reports incorrect PMA capabilities which includes > 10G/5G and also incorrectly disables capabilities like autoneg > and 10Mbps support. > > AQR115c as per the Marvell databook supports speeds up to 2.5Gbps > with autonegotiation. > > Fixes: 0ebc581f8a4b ("net: phy: aquantia: add support for aqr115c") > Link: https://lore.kernel.org/all/20240913011635.1286027-1-quic_abchauha@quicinc.com/T/ > Signed-off-by: Abhishek Chauhan <quic_abchauha@quicinc.com> > --- [...] > > +static int aqr115c_get_features(struct phy_device *phydev) > +{ > + int ret; > + __ETHTOOL_DECLARE_LINK_MODE_MASK(supported) = { 0, }; > + > + /* Normal feature discovery */ > + ret = genphy_c45_pma_read_abilities(phydev); > + if (ret) > + return ret; > + > + /* PHY FIXUP */ > + /* Although the PHY sets bit 12.18.19.48, it does not support 5G/10G modes */ > + linkmode_clear_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, phydev->supported); > + linkmode_clear_bit(ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, phydev->supported); > + linkmode_clear_bit(ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, phydev->supported); > + linkmode_clear_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, phydev->supported); > + > + /* Phy supports Speeds up to 2.5G with Autoneg though the phy PMA says otherwise */ > + linkmode_copy(supported, phy_gbit_features); > + linkmode_set_bit(ETHTOOL_LINK_MODE_2500baseX_Full_BIT, supported); I still think you shouldn't report 2500BaseX, as you mentionned it's a BaseT PHY. This is independent of the modes that the PHY uses to connect to the MAC. Although the PHY can talk to the MAC using 2500BaseX on its MII interface, it looks like it can't use 2500BaseX on its MDI (the LP side of the PHY). There's the same issue in patch 2. Thanks, Maxime ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH net v3 1/2] net: phy: aquantia: AQR115c fix up PMA capabilities 2024-09-26 6:42 ` Maxime Chevallier @ 2024-09-27 0:17 ` Abhishek Chauhan (ABC) 0 siblings, 0 replies; 7+ messages in thread From: Abhishek Chauhan (ABC) @ 2024-09-27 0:17 UTC (permalink / raw) To: Maxime Chevallier Cc: David S. Miller, Eric Dumazet, Jakub Kicinski, Paolo Abeni, netdev, linux-kernel, Andrew Halaney, Russell King (Oracle), Andrew Lunn, Heiner Kallweit, Bartosz Golaszewski, linux-tegra@vger.kernel.org, Brad Griffis, Vladimir Oltean, Jon Hunter, Przemek Kitszel, kernel On 9/25/2024 11:42 PM, Maxime Chevallier wrote: > Hello, > > On Wed, 25 Sep 2024 16:01:28 -0700 > Abhishek Chauhan <quic_abchauha@quicinc.com> wrote: > >> AQR115c reports incorrect PMA capabilities which includes >> 10G/5G and also incorrectly disables capabilities like autoneg >> and 10Mbps support. >> >> AQR115c as per the Marvell databook supports speeds up to 2.5Gbps >> with autonegotiation. >> >> Fixes: 0ebc581f8a4b ("net: phy: aquantia: add support for aqr115c") >> Link: https://lore.kernel.org/all/20240913011635.1286027-1-quic_abchauha@quicinc.com/T/ >> Signed-off-by: Abhishek Chauhan <quic_abchauha@quicinc.com> >> --- > > [...] > >> >> +static int aqr115c_get_features(struct phy_device *phydev) >> +{ >> + int ret; >> + __ETHTOOL_DECLARE_LINK_MODE_MASK(supported) = { 0, }; >> + >> + /* Normal feature discovery */ >> + ret = genphy_c45_pma_read_abilities(phydev); >> + if (ret) >> + return ret; >> + >> + /* PHY FIXUP */ >> + /* Although the PHY sets bit 12.18.19.48, it does not support 5G/10G modes */ >> + linkmode_clear_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, phydev->supported); >> + linkmode_clear_bit(ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, phydev->supported); >> + linkmode_clear_bit(ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, phydev->supported); >> + linkmode_clear_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, phydev->supported); >> + >> + /* Phy supports Speeds up to 2.5G with Autoneg though the phy PMA says otherwise */ >> + linkmode_copy(supported, phy_gbit_features); >> + linkmode_set_bit(ETHTOOL_LINK_MODE_2500baseX_Full_BIT, supported); > > I still think you shouldn't report 2500BaseX, as you mentionned > it's a BaseT PHY. This is independent of the modes that the PHY uses to > connect to the MAC. Although the PHY can talk to the MAC using > 2500BaseX on its MII interface, it looks like it can't use > 2500BaseX on its MDI (the LP side of the PHY). There's the same issue in > patch 2. > I Agree with you. I did some experiments today without setting the 2500BaseX bit and i see the link still comes up with 2.5Gbps with autoneg on. I will rectify this as part of the next patch Thanks Maxime > Thanks, > > Maxime ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH net v3 1/2] net: phy: aquantia: AQR115c fix up PMA capabilities 2024-09-25 23:01 ` [PATCH net v3 1/2] net: phy: aquantia: AQR115c fix up " Abhishek Chauhan 2024-09-26 6:42 ` Maxime Chevallier @ 2024-09-26 11:45 ` Russell King (Oracle) 2024-09-27 0:19 ` Abhishek Chauhan (ABC) 1 sibling, 1 reply; 7+ messages in thread From: Russell King (Oracle) @ 2024-09-26 11:45 UTC (permalink / raw) To: Abhishek Chauhan Cc: David S. Miller, Eric Dumazet, Jakub Kicinski, Paolo Abeni, netdev, linux-kernel, Andrew Halaney, Andrew Lunn, Heiner Kallweit, Bartosz Golaszewski, linux-tegra@vger.kernel.org, Brad Griffis, Vladimir Oltean, Jon Hunter, Maxime Chevallier, Przemek Kitszel, kernel On Wed, Sep 25, 2024 at 04:01:28PM -0700, Abhishek Chauhan wrote: > diff --git a/drivers/net/phy/aquantia/aquantia_main.c b/drivers/net/phy/aquantia/aquantia_main.c > index e982e9ce44a5..88ba12aaf6e0 100644 > --- a/drivers/net/phy/aquantia/aquantia_main.c > +++ b/drivers/net/phy/aquantia/aquantia_main.c > @@ -767,6 +767,33 @@ static int aqr111_config_init(struct phy_device *phydev) > return aqr107_config_init(phydev); > } > > +static int aqr115c_get_features(struct phy_device *phydev) > +{ > + int ret; > + __ETHTOOL_DECLARE_LINK_MODE_MASK(supported) = { 0, }; Networking uses reverse-christmas tree ordering for variables. Please swap the order of these. Also, I think this would be better: unsigned long *supported = phydev->supported; You don't actually need a separate mask. > + > + /* Normal feature discovery */ > + ret = genphy_c45_pma_read_abilities(phydev); > + if (ret) > + return ret; > + > + /* PHY FIXUP */ > + /* Although the PHY sets bit 12.18.19.48, it does not support 5G/10G modes */ > + linkmode_clear_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, phydev->supported); > + linkmode_clear_bit(ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, phydev->supported); > + linkmode_clear_bit(ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, phydev->supported); > + linkmode_clear_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, phydev->supported); For the above four, s/phydev->supported/supported/ > + > + /* Phy supports Speeds up to 2.5G with Autoneg though the phy PMA says otherwise */ > + linkmode_copy(supported, phy_gbit_features); > + linkmode_set_bit(ETHTOOL_LINK_MODE_2500baseX_Full_BIT, supported); > + linkmode_set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, supported); > + > + linkmode_or(phydev->supported, supported, phydev->supported); Drop this linkmode_or(). You'll then be modifying phydev->supported directly, which is totally fine. -- RMK's Patch system: https://www.armlinux.org.uk/developer/patches/ FTTP is here! 80Mbps down 10Mbps up. Decent connectivity at last! ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH net v3 1/2] net: phy: aquantia: AQR115c fix up PMA capabilities 2024-09-26 11:45 ` Russell King (Oracle) @ 2024-09-27 0:19 ` Abhishek Chauhan (ABC) 0 siblings, 0 replies; 7+ messages in thread From: Abhishek Chauhan (ABC) @ 2024-09-27 0:19 UTC (permalink / raw) To: Russell King (Oracle) Cc: David S. Miller, Eric Dumazet, Jakub Kicinski, Paolo Abeni, netdev, linux-kernel, Andrew Halaney, Andrew Lunn, Heiner Kallweit, Bartosz Golaszewski, linux-tegra@vger.kernel.org, Brad Griffis, Vladimir Oltean, Jon Hunter, Maxime Chevallier, Przemek Kitszel, kernel On 9/26/2024 4:45 AM, Russell King (Oracle) wrote: > On Wed, Sep 25, 2024 at 04:01:28PM -0700, Abhishek Chauhan wrote: >> diff --git a/drivers/net/phy/aquantia/aquantia_main.c b/drivers/net/phy/aquantia/aquantia_main.c >> index e982e9ce44a5..88ba12aaf6e0 100644 >> --- a/drivers/net/phy/aquantia/aquantia_main.c >> +++ b/drivers/net/phy/aquantia/aquantia_main.c >> @@ -767,6 +767,33 @@ static int aqr111_config_init(struct phy_device *phydev) >> return aqr107_config_init(phydev); >> } >> >> +static int aqr115c_get_features(struct phy_device *phydev) >> +{ >> + int ret; >> + __ETHTOOL_DECLARE_LINK_MODE_MASK(supported) = { 0, }; > > Networking uses reverse-christmas tree ordering for variables. Please > swap the order of these. > > Also, I think this would be better: > > unsigned long *supported = phydev->supported; > > You don't actually need a separate mask. > >> + >> + /* Normal feature discovery */ >> + ret = genphy_c45_pma_read_abilities(phydev); >> + if (ret) >> + return ret; >> + >> + /* PHY FIXUP */ >> + /* Although the PHY sets bit 12.18.19.48, it does not support 5G/10G modes */ >> + linkmode_clear_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, phydev->supported); >> + linkmode_clear_bit(ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, phydev->supported); >> + linkmode_clear_bit(ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, phydev->supported); >> + linkmode_clear_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, phydev->supported); > > For the above four, s/phydev->supported/supported/ > >> + >> + /* Phy supports Speeds up to 2.5G with Autoneg though the phy PMA says otherwise */ >> + linkmode_copy(supported, phy_gbit_features); >> + linkmode_set_bit(ETHTOOL_LINK_MODE_2500baseX_Full_BIT, supported); >> + linkmode_set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, supported); >> + >> + linkmode_or(phydev->supported, supported, phydev->supported); > > Drop this linkmode_or(). > > You'll then be modifying phydev->supported directly, which is totally > fine. Noted!. Thanks Russell. Appreciate all the reviews. > ^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH net v3 2/2] net: phy: aquantia: remove usage of phy_set_max_speed 2024-09-25 23:01 [PATCH net v3 0/2] Fix AQR PMA capabilities Abhishek Chauhan 2024-09-25 23:01 ` [PATCH net v3 1/2] net: phy: aquantia: AQR115c fix up " Abhishek Chauhan @ 2024-09-25 23:01 ` Abhishek Chauhan 1 sibling, 0 replies; 7+ messages in thread From: Abhishek Chauhan @ 2024-09-25 23:01 UTC (permalink / raw) To: David S. Miller, Eric Dumazet, Jakub Kicinski, Paolo Abeni, netdev, linux-kernel, Andrew Halaney, Russell King (Oracle), Andrew Lunn, Heiner Kallweit, Bartosz Golaszewski, linux-tegra@vger.kernel.org, Brad Griffis, Vladimir Oltean, Jon Hunter, Maxime Chevallier, Przemek Kitszel Cc: kernel Remove the use of phy_set_max_speed in phy driver as the function is mainly used in MAC driver to set the max speed. Instead use get_features to fix up Phy PMA capabilities for AQR111, AQR111B0, AQR114C and AQCS109 Fixes: 038ba1dc4e54 ("net: phy: aquantia: add AQR111 and AQR111B0 PHY ID") Fixes: 0974f1f03b07 ("net: phy: aquantia: remove false 5G and 10G speed ability for AQCS109") Fixes: c278ec644377 ("net: phy: aquantia: add support for AQR114C PHY ID") Link: https://lore.kernel.org/all/20240913011635.1286027-1-quic_abchauha@quicinc.com/T/ Signed-off-by: Abhishek Chauhan <quic_abchauha@quicinc.com> --- Changes since v2 1. seperate out the changes into two different patches. 2. remove usage of phy_set_max_speed from the aquantia driver 3. use phy_gbit_features instead of initializing each and every link mode bits. 4. write seperate functions for 5Gbps supported phy 5. remove FIBRE bit which was introduced in patch 1 Changes since v1 1. remove usage of phy_set_max_speed in the aquantia driver code. 2. Introduce aqr_custom_get_feature which checks for the phy id and takes necessary actions based on max_speed supported by the phy 3. remove aqr111_config_init as it is just a wrapper function. drivers/net/phy/aquantia/aquantia_main.c | 53 +++++++++++++++--------- 1 file changed, 34 insertions(+), 19 deletions(-) diff --git a/drivers/net/phy/aquantia/aquantia_main.c b/drivers/net/phy/aquantia/aquantia_main.c index 88ba12aaf6e0..c508f63f7fac 100644 --- a/drivers/net/phy/aquantia/aquantia_main.c +++ b/drivers/net/phy/aquantia/aquantia_main.c @@ -527,12 +527,6 @@ static int aqcs109_config_init(struct phy_device *phydev) if (!ret) aqr107_chip_info(phydev); - /* AQCS109 belongs to a chip family partially supporting 10G and 5G. - * PMA speed ability bits are the same for all members of the family, - * AQCS109 however supports speeds up to 2.5G only. - */ - phy_set_max_speed(phydev, SPEED_2500); - return aqr107_set_downshift(phydev, MDIO_AN_VEND_PROV_DOWNSHIFT_DFLT); } @@ -741,6 +735,33 @@ static int aqr113c_config_init(struct phy_device *phydev) return aqr113c_fill_interface_modes(phydev); } +static int aqr111_get_features(struct phy_device *phydev) +{ + int ret; + __ETHTOOL_DECLARE_LINK_MODE_MASK(supported) = { 0, }; + + /* Normal feature discovery */ + ret = genphy_c45_pma_read_abilities(phydev); + if (ret) + return ret; + + /* PHY FIXUP */ + /* Although the PHY sets bit 12.18.19, it does not support 10G modes */ + linkmode_clear_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, phydev->supported); + linkmode_clear_bit(ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, phydev->supported); + linkmode_clear_bit(ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, phydev->supported); + + /* Phy supports Speeds up to 5G with Autoneg though the phy PMA says otherwise */ + linkmode_copy(supported, phy_gbit_features); + linkmode_set_bit(ETHTOOL_LINK_MODE_2500baseX_Full_BIT, supported); + linkmode_set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, supported); + linkmode_set_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, supported); + + linkmode_or(phydev->supported, supported, phydev->supported); + + return 0; +} + static int aqr107_probe(struct phy_device *phydev) { int ret; @@ -757,16 +778,6 @@ static int aqr107_probe(struct phy_device *phydev) return aqr_hwmon_probe(phydev); } -static int aqr111_config_init(struct phy_device *phydev) -{ - /* AQR111 reports supporting speed up to 10G, - * however only speeds up to 5G are supported. - */ - phy_set_max_speed(phydev, SPEED_5000); - - return aqr107_config_init(phydev); -} - static int aqr115c_get_features(struct phy_device *phydev) { int ret; @@ -870,6 +881,7 @@ static struct phy_driver aqr_driver[] = { .get_sset_count = aqr107_get_sset_count, .get_strings = aqr107_get_strings, .get_stats = aqr107_get_stats, + .get_features = aqr115c_get_features, .link_change_notify = aqr107_link_change_notify, .led_brightness_set = aqr_phy_led_brightness_set, .led_hw_is_supported = aqr_phy_led_hw_is_supported, @@ -882,7 +894,7 @@ static struct phy_driver aqr_driver[] = { .name = "Aquantia AQR111", .probe = aqr107_probe, .get_rate_matching = aqr107_get_rate_matching, - .config_init = aqr111_config_init, + .config_init = aqr107_config_init, .config_aneg = aqr_config_aneg, .config_intr = aqr_config_intr, .handle_interrupt = aqr_handle_interrupt, @@ -894,6 +906,7 @@ static struct phy_driver aqr_driver[] = { .get_sset_count = aqr107_get_sset_count, .get_strings = aqr107_get_strings, .get_stats = aqr107_get_stats, + .get_features = aqr111_get_features, .link_change_notify = aqr107_link_change_notify, .led_brightness_set = aqr_phy_led_brightness_set, .led_hw_is_supported = aqr_phy_led_hw_is_supported, @@ -906,7 +919,7 @@ static struct phy_driver aqr_driver[] = { .name = "Aquantia AQR111B0", .probe = aqr107_probe, .get_rate_matching = aqr107_get_rate_matching, - .config_init = aqr111_config_init, + .config_init = aqr107_config_init, .config_aneg = aqr_config_aneg, .config_intr = aqr_config_intr, .handle_interrupt = aqr_handle_interrupt, @@ -918,6 +931,7 @@ static struct phy_driver aqr_driver[] = { .get_sset_count = aqr107_get_sset_count, .get_strings = aqr107_get_strings, .get_stats = aqr107_get_stats, + .get_features = aqr111_get_features, .link_change_notify = aqr107_link_change_notify, .led_brightness_set = aqr_phy_led_brightness_set, .led_hw_is_supported = aqr_phy_led_hw_is_supported, @@ -1027,7 +1041,7 @@ static struct phy_driver aqr_driver[] = { .name = "Aquantia AQR114C", .probe = aqr107_probe, .get_rate_matching = aqr107_get_rate_matching, - .config_init = aqr111_config_init, + .config_init = aqr107_config_init, .config_aneg = aqr_config_aneg, .config_intr = aqr_config_intr, .handle_interrupt = aqr_handle_interrupt, @@ -1039,6 +1053,7 @@ static struct phy_driver aqr_driver[] = { .get_sset_count = aqr107_get_sset_count, .get_strings = aqr107_get_strings, .get_stats = aqr107_get_stats, + .get_features = aqr111_get_features, .link_change_notify = aqr107_link_change_notify, .led_brightness_set = aqr_phy_led_brightness_set, .led_hw_is_supported = aqr_phy_led_hw_is_supported, -- 2.25.1 ^ permalink raw reply related [flat|nested] 7+ messages in thread
end of thread, other threads:[~2024-09-27 0:19 UTC | newest] Thread overview: 7+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2024-09-25 23:01 [PATCH net v3 0/2] Fix AQR PMA capabilities Abhishek Chauhan 2024-09-25 23:01 ` [PATCH net v3 1/2] net: phy: aquantia: AQR115c fix up " Abhishek Chauhan 2024-09-26 6:42 ` Maxime Chevallier 2024-09-27 0:17 ` Abhishek Chauhan (ABC) 2024-09-26 11:45 ` Russell King (Oracle) 2024-09-27 0:19 ` Abhishek Chauhan (ABC) 2024-09-25 23:01 ` [PATCH net v3 2/2] net: phy: aquantia: remove usage of phy_set_max_speed Abhishek Chauhan
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