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From: Guillaume Nault <gnault@redhat.com>
To: Simon Horman <horms@kernel.org>
Cc: Roger Quadros <rogerq@kernel.org>,
	Siddharth Vadapalli <s-vadapalli@ti.com>,
	Andrew Lunn <andrew+netdev@lunn.ch>,
	"David S. Miller" <davem@davemloft.net>,
	Eric Dumazet <edumazet@google.com>,
	Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
	linux-omap@vger.kernel.org, netdev@vger.kernel.org,
	linux-kernel@vger.kernel.org, srk@ti.com,
	Pekka Varis <p-varis@ti.com>, Ido Schimmel <idosch@idosch.org>
Subject: Re: [PATCH net-next v3 0/2] net: ethernet: ti: am65-cpsw: enable DSCP to priority map for RX
Date: Thu, 14 Nov 2024 01:19:25 +0100	[thread overview]
Message-ID: <ZzVCDZR8a/xchDU6@debian> (raw)
In-Reply-To: <20241112140833.GP4507@kernel.org>

On Tue, Nov 12, 2024 at 02:08:33PM +0000, Simon Horman wrote:
> + Ido and Guilliame
> 
> On Sat, Nov 09, 2024 at 01:00:06PM +0200, Roger Quadros wrote:
> > Configure DSCP to Priority mapping registers so that IP precedence
> > field (top 3 bits of DSCP) map it to one of the 8 priority queues
> > for RX traffic.
> >     
> > Also update Priority to Thread maping to be compliant with
> > IEEE802.1Q-2014. Priority Code Point (PCP) 2 is higher priority than
> > PCP 0 (Best Effort). PCP 1 (Background) is lower priority than
> > PCP 0 (Best Effort).
> > 
> > Signed-off-by: Roger Quadros <rogerq@kernel.org>
> 
> Hi Ido and Guilliame,
> 
> I am wondering if you could find time to review this series.

I don't have the IEEE802.1Q-2014 spec at hand, so I focused on
patch 2/2.

> > ---
> > Changes in v3:
> > - Added Reviewed-by tag to patch 1
> > - Added macros for DSCP PRI field size and DSCP PRI per register
> > - Drop unnecessary readl() in am65_cpsw_port_set_dscp_map()
> > - Link to v2: https://lore.kernel.org/r/20241107-am65-cpsw-multi-rx-dscp-v2-0-9e9cd1920035@kernel.org
> > 
> > Changes in v2:
> > - Updated references to more recent standard IEEE802.1Q-2014.
> > - Dropped reference to web link which might change in the future.
> > - Typo fix in commit log.
> > - Link to v1: https://lore.kernel.org/r/20241105-am65-cpsw-multi-rx-dscp-v1-0-38db85333c88@kernel.org
> > 
> > ---
> > Roger Quadros (2):
> >       net: ethernet: ti: am65-cpsw: update pri_thread_map as per IEEE802.1Q-2014
> >       net: ethernet: ti: am65-cpsw: enable DSCP to priority map for RX
> > 
> >  drivers/net/ethernet/ti/am65-cpsw-nuss.c | 54 ++++++++++++++++++++++++++++++++
> >  drivers/net/ethernet/ti/cpsw_ale.c       | 36 ++++++++++++---------
> >  2 files changed, 76 insertions(+), 14 deletions(-)
> > ---
> > base-commit: 42f7652d3eb527d03665b09edac47f85fb600924
> > change-id: 20241101-am65-cpsw-multi-rx-dscp-000b2c4af6d0
> > 
> > Best regards,
> > -- 
> > Roger Quadros <rogerq@kernel.org>
> > 
> 


  reply	other threads:[~2024-11-14  0:19 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-11-09 11:00 [PATCH net-next v3 0/2] net: ethernet: ti: am65-cpsw: enable DSCP to priority map for RX Roger Quadros
2024-11-09 11:00 ` [PATCH net-next v3 1/2] net: ethernet: ti: am65-cpsw: update pri_thread_map as per IEEE802.1Q-2014 Roger Quadros
2024-11-09 11:00 ` [PATCH net-next v3 2/2] net: ethernet: ti: am65-cpsw: enable DSCP to priority map for RX Roger Quadros
2024-11-11  5:28   ` Siddharth Vadapalli
2024-11-14  0:16   ` Guillaume Nault
2024-11-14  9:41     ` Roger Quadros
2024-11-14 10:12       ` Roger Quadros
2024-11-14 12:02         ` Guillaume Nault
2024-11-14 12:47           ` Roger Quadros
2024-11-14 13:17             ` Guillaume Nault
2024-11-14 12:13       ` Guillaume Nault
2024-11-12 14:08 ` [PATCH net-next v3 0/2] " Simon Horman
2024-11-14  0:19   ` Guillaume Nault [this message]
2024-11-14  8:55     ` Roger Quadros

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