From: Guillaume Nault <gnault@redhat.com>
To: Roger Quadros <rogerq@kernel.org>
Cc: Siddharth Vadapalli <s-vadapalli@ti.com>,
Andrew Lunn <andrew+netdev@lunn.ch>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
Simon Horman <horms@kernel.org>,
linux-omap@vger.kernel.org, netdev@vger.kernel.org,
linux-kernel@vger.kernel.org, srk@ti.com,
Pekka Varis <p-varis@ti.com>
Subject: Re: [PATCH net-next v4 2/2] net: ethernet: ti: am65-cpsw: enable DSCP to priority map for RX
Date: Thu, 14 Nov 2024 15:07:27 +0100 [thread overview]
Message-ID: <ZzYEH+q4AG5FBCiG@debian> (raw)
In-Reply-To: <20241114-am65-cpsw-multi-rx-dscp-v4-2-93eaf6760759@kernel.org>
On Thu, Nov 14, 2024 at 03:36:53PM +0200, Roger Quadros wrote:
> AM65 CPSW hardware can map the 6-bit DSCP/TOS field to
> appropriate priority queue via DSCP to Priority mapping registers
> (CPSW_PN_RX_PRI_MAP_REG).
>
> Use a default DSCP to User Priority (UP) mapping as per
> https://datatracker.ietf.org/doc/html/rfc8325#section-4.3
> and
> https://datatracker.ietf.org/doc/html/rfc8622#section-11
Reviewed-by: Guillaume Nault <gnault@redhat.com>
next prev parent reply other threads:[~2024-11-14 14:07 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-11-14 13:36 [PATCH net-next v4 0/2] net: ethernet: ti: am65-cpsw: enable DSCP to priority map for RX Roger Quadros
2024-11-14 13:36 ` [PATCH net-next v4 1/2] net: ethernet: ti: am65-cpsw: update pri_thread_map as per IEEE802.1Q-2014 Roger Quadros
2024-11-14 15:43 ` Guillaume Nault
2024-11-14 13:36 ` [PATCH net-next v4 2/2] net: ethernet: ti: am65-cpsw: enable DSCP to priority map for RX Roger Quadros
2024-11-14 14:07 ` Guillaume Nault [this message]
2024-11-18 12:10 ` [PATCH net-next v4 0/2] " patchwork-bot+netdevbpf
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