Re: [net-next,PATCH v5 3/3] net: phy: realtek: Add property to enable SSC

[Aleksander Jan Bajkowski <olek2@wp.pl>]

Hi Marek,


On 26/03/2026 22:06, Marek Vasut wrote:
> Add support for spread spectrum clocking (SSC) on RTL8211F(D)(I)-CG,
> RTL8211FS(I)(-VS)-CG, RTL8211FG(I)(-VS)-CG PHYs. The implementation
> follows EMI improvement application note Rev. 1.2 for these PHYs.
>
> The current implementation enables SSC for both RXC and SYSCLK clock
> signals. Introduce DT properties 'realtek,clkout-ssc-enable',
> 'realtek,rxc-ssc-enable' and 'realtek,sysclk-ssc-enable' which control
> CLKOUT, RXC and SYSCLK SSC spread spectrum clocking enablement on these
> signals.
>
> Signed-off-by: Marek Vasut <marek.vasut@mailbox.org>
> ---
> Cc: "David S. Miller" <davem@davemloft.net>
> Cc: Aleksander Jan Bajkowski <olek2@wp.pl>
> Cc: Andrew Lunn <andrew@lunn.ch>
> Cc: Conor Dooley <conor+dt@kernel.org>
> Cc: Eric Dumazet <edumazet@google.com>
> Cc: Florian Fainelli <f.fainelli@gmail.com>
> Cc: Heiner Kallweit <hkallweit1@gmail.com>
> Cc: Ivan Galkin <ivan.galkin@axis.com>
> Cc: Jakub Kicinski <kuba@kernel.org>
> Cc: Krzysztof Kozlowski <krzk+dt@kernel.org>
> Cc: Michael Klein <michael@fossekall.de>
> Cc: Paolo Abeni <pabeni@redhat.com>
> Cc: Rob Herring <robh@kernel.org>
> Cc: Russell King <linux@armlinux.org.uk>
> Cc: Vladimir Oltean <vladimir.oltean@nxp.com>
> Cc: devicetree@vger.kernel.org
> Cc: netdev@vger.kernel.org
> ---
> V2: Split SSC clock control for each CLKOUT, RXC, SYSCLK signal
> V3: Update RTL8211FVD PHYCR2 comment to state this PHY has PHYCR2 register,
>      but SSC configuration is not supported due to different layout.
> V4: - Perform all SSC configuration before disabling CLKOUT
>      - Perform all SSC configuration in the same order as in the SSC appnote
>      - Rebase on current next, retest using spectrum analyzer again
> V5: s@SCC@SSC@ typo
> ---
>   drivers/net/phy/realtek/realtek_main.c | 131 +++++++++++++++++++++++++
>   1 file changed, 131 insertions(+)
>
> diff --git a/drivers/net/phy/realtek/realtek_main.c b/drivers/net/phy/realtek/realtek_main.c
> index 023e47ad605bd..0b5d35841fdd4 100644
> --- a/drivers/net/phy/realtek/realtek_main.c
> +++ b/drivers/net/phy/realtek/realtek_main.c
> @@ -75,10 +75,18 @@
>   
>   #define RTL8211F_PHYCR2				0x19
>   #define RTL8211F_CLKOUT_EN			BIT(0)
> +#define RTL8211F_SYSCLK_SSC_EN			BIT(3)
>   #define RTL8211F_PHYCR2_PHY_EEE_ENABLE		BIT(5)
> +#define RTL8211F_CLKOUT_SSC_EN			BIT(7)
>   
>   #define RTL8211F_INSR				0x1d
>   
> +/* RTL8211F SSC settings */
> +#define RTL8211F_SSC_PAGE			0xc44
> +#define RTL8211F_SSC_RXC			0x13
> +#define RTL8211F_SSC_SYSCLK			0x17
> +#define RTL8211F_SSC_CLKOUT			0x19
> +
>   /* RTL8211F LED configuration */
>   #define RTL8211F_LEDCR_PAGE			0xd04
>   #define RTL8211F_LEDCR				0x10
> @@ -215,6 +223,9 @@ MODULE_LICENSE("GPL");
>   struct rtl821x_priv {
>   	bool enable_aldps;
>   	bool disable_clk_out;
> +	bool enable_clkout_ssc;
> +	bool enable_rxc_ssc;
> +	bool enable_sysclk_ssc;
>   	struct clk *clk;
>   	/* rtl8211f */
>   	u16 iner;
> @@ -278,6 +289,12 @@ static int rtl821x_probe(struct phy_device *phydev)
>   						   "realtek,aldps-enable");
>   	priv->disable_clk_out = of_property_read_bool(dev->of_node,
>   						      "realtek,clkout-disable");
> +	priv->enable_clkout_ssc = of_property_read_bool(dev->of_node,
> +							"realtek,clkout-ssc-enable");
> +	priv->enable_rxc_ssc = of_property_read_bool(dev->of_node,
> +						     "realtek,rxc-ssc-enable");
> +	priv->enable_sysclk_ssc = of_property_read_bool(dev->of_node,
> +							"realtek,sysclk-ssc-enable");
>   
>   	phydev->priv = priv;
>   
> @@ -707,6 +724,108 @@ static int rtl8211f_config_phy_eee(struct phy_device *phydev)
>   			  RTL8211F_PHYCR2_PHY_EEE_ENABLE, 0);
>   }
>   
> +static int rtl8211f_config_clkout_ssc(struct phy_device *phydev)
> +{
> +	struct rtl821x_priv *priv = phydev->priv;
> +	struct device *dev = &phydev->mdio.dev;
> +	int ret;
> +
> +	/* The value is preserved if the device tree property is absent */
> +	if (!priv->enable_clkout_ssc)
> +		return 0;
> +
> +	/* RTL8211FVD has PHYCR2 register, but configuration of CLKOUT SSC
> +	 * is not currently supported by this driver due to different bit
> +	 * layout.
> +	 */
> +	if (phydev->drv->phy_id == RTL_8211FVD_PHYID)
> +		return 0;
> +
> +	/* Unnamed registers from EMI improvement parameters application note 1.2 */
> +	ret = phy_write_paged(phydev, 0xd09, 0x10, 0xcf00);
> +	if (ret < 0) {
> +		dev_err(dev, "CLKOUT SSC initialization failed: %pe\n", ERR_PTR(ret));
> +		return ret;
> +	}
> +
> +	ret = phy_write(phydev, RTL8211F_SSC_CLKOUT, 0x38c3);

Only registers 0x10–0x17 require paged operations. The remaining registers
are mapped directly into the PHY address space. This is mentioned in commit
650e55f224a575cdb18c984b95036109519502d1. Paged and direct access return
the same results. With this in mind, I believe that RTL8211F_SSC_CLKOUT is
an alias for RTL8211F_PHYCR2 and is described on page 45 of the 
datasheet[1].

1. RTL8211F(I)-CG/RTL8211FD(I)-CG Datasheet

Best Regards,
Aleksander