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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Maxime Chevallier , Maxime Coquelin , Alexandre Torgue , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org References: <20261010105900.247342-1-tanure@linux.com> <20261010105900.247342-9-tanure@linux.com> <20261012-suds-karaoke-efc4acf056af@spud> Content-Language: en-US From: Lucas Tanure In-Reply-To: <20261012-suds-karaoke-efc4acf056af@spud> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 12/10/2026 20:18, Conor Dooley wrote: > On Sat, Oct 10, 2026 at 11:59:00AM +0100, Lucas Tanure wrote: >> The informative section explains in prose how phy-mode, the delay >> properties in the MAC node and the mode handed to the PHY fit together, >> and says itself that developers often get this wrong. A reader has to >> work through several paragraphs before answering the one question they >> usually have: for this phy-mode and these properties, which part adds >> which delay. >> >> Add a table that answers it at a glance, with one row for every >> combination the properties allow. >> >> Assisted-by: LLM >> Signed-off-by: Lucas Tanure > > If the net guys think this is valuable, > Acked-by: Conor Dooley > Thanks, but I will drop this patch as is wrong.> (although for something like this, us acking probably ain't needed, > ehh?) > >> --- >> .../bindings/net/ethernet-controller.yaml | 18 ++++++++++++++++++ >> 1 file changed, 18 insertions(+) >> >> diff --git a/Documentation/devicetree/bindings/net/ethernet-controller.yaml b/Documentation/devicetree/bindings/net/ethernet-controller.yaml >> index 1bafd687dcb1..bba27a9feb61 100644 >> --- a/Documentation/devicetree/bindings/net/ethernet-controller.yaml >> +++ b/Documentation/devicetree/bindings/net/ethernet-controller.yaml >> @@ -339,6 +339,24 @@ additionalProperties: true >> # has added. Failure to remove the delay will result in a >> # non-functioning link. >> # >> +# Put together, with the two properties in the MAC node, this is who >> +# adds each delay: >> +# >> +# phy-mode tx-internal-delay-ps rx-internal-delay-ps TX delay RX delay >> +# rgmii - - PCB trace PCB trace >> +# rgmii-id - - PHY PHY >> +# rgmii-id present - MAC PHY >> +# rgmii-id - present PHY MAC >> +# rgmii-id present present MAC MAC >> +# rgmii-txid - - PHY PCB trace >> +# rgmii-txid present - MAC PCB trace >> +# rgmii-rxid - - PCB trace PHY >> +# rgmii-rxid - present PCB trace MAC >> +# >> +# A property for a clock the PCB already delays is not in this table. >> +# It is either the fine tuning described next, or a mistake the MAC >> +# should report as a fatal error. >> +# >> # Sometimes there is a need to fine tune the delays. Often the MAC or >> # PHY can perform this fine tuning. In the MAC node, the Device Tree >> # properties 'rx-internal-delay-ps' and 'tx-internal-delay-ps' should >> -- >> 2.56.0 >>