From: Paolo Abeni <pabeni@redhat.com>
To: Heiner Kallweit <hkallweit1@gmail.com>, javen <javen_xu@realsil.com.cn>
Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org,
nic_swsd@realtek.com, andrew+netdev@lunn.ch, davem@davemloft.net,
edumazet@google.com, kuba@kernel.org, horms@kernel.org
Subject: Re: [PATCH net-next v1 3/3] r8169: add support for chip RTL9151AS
Date: Thu, 15 Jan 2026 11:51:03 +0100 [thread overview]
Message-ID: <a244b2c5-b3d6-4150-b9ab-8be20d72bf23@redhat.com> (raw)
In-Reply-To: <02c00a95-34c6-4b01-8f0a-7dbd113e26ba@gmail.com>
On 1/12/26 11:20 PM, Heiner Kallweit wrote:
> On 1/12/2026 3:45 AM, javen wrote:
>> From: Javen Xu <javen_xu@realsil.com.cn>
>>
>> This patch adds support for chip RTL9151AS. Since lacking of Hardware
>> version IDs, we use TX_CONFIG_V2 to recognize RTL9151AS and coming chips.
>> rtl_chip_infos_extend is used to store IC information for RTL9151AS and
>> coming chips. The TxConfig value between RTL9151AS and RTL9151A is
>>
>> different.
>>
>> Signed-off-by: Javen Xu <javen_xu@realsil.com.cn>
>> ---
>> drivers/net/ethernet/realtek/r8169.h | 3 ++-
>> drivers/net/ethernet/realtek/r8169_main.c | 28 +++++++++++++++++++++--
>> 2 files changed, 28 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/net/ethernet/realtek/r8169.h b/drivers/net/ethernet/realtek/r8169.h
>> index 2c1a0c21af8d..f66c279cbee6 100644
>> --- a/drivers/net/ethernet/realtek/r8169.h
>> +++ b/drivers/net/ethernet/realtek/r8169.h
>> @@ -72,7 +72,8 @@ enum mac_version {
>> RTL_GIGA_MAC_VER_70,
>> RTL_GIGA_MAC_VER_80,
>> RTL_GIGA_MAC_NONE,
>> - RTL_GIGA_MAC_VER_LAST = RTL_GIGA_MAC_NONE - 1
>> + RTL_GIGA_MAC_VER_LAST = RTL_GIGA_MAC_NONE - 1,
>> + RTL_GIGA_MAC_VER_CHECK_EXTEND
>> };
>>
>> struct rtl8169_private;
>> diff --git a/drivers/net/ethernet/realtek/r8169_main.c b/drivers/net/ethernet/realtek/r8169_main.c
>> index 9b89bbf67198..164ad6570059 100644
>> --- a/drivers/net/ethernet/realtek/r8169_main.c
>> +++ b/drivers/net/ethernet/realtek/r8169_main.c
>> @@ -95,8 +95,8 @@
>> #define JUMBO_16K (SZ_16K - VLAN_ETH_HLEN - ETH_FCS_LEN)
>>
>> static const struct rtl_chip_info {
>> - u16 mask;
>> - u16 val;
>> + u32 mask;
>> + u32 val;
>> enum mac_version mac_version;
>> const char *name;
>> const char *fw_name;
>> @@ -205,10 +205,20 @@ static const struct rtl_chip_info {
>> { 0xfc8, 0x040, RTL_GIGA_MAC_VER_03, "RTL8110s" },
>> { 0xfc8, 0x008, RTL_GIGA_MAC_VER_02, "RTL8169s" },
>>
>> + /* extend chip version*/
>> + { 0x7cf, 0x7c8, RTL_GIGA_MAC_VER_CHECK_EXTEND },
>> +
>> /* Catch-all */
>> { 0x000, 0x000, RTL_GIGA_MAC_NONE }
>> };
>>
>> +static const struct rtl_chip_info rtl_chip_infos_extend[] = {
>> + { 0x7fffffff, 0x00000000, RTL_GIGA_MAC_VER_64, "RTL9151AS", FIRMWARE_9151A_1},
>> +
>
> Seems all bits except bit 31 are used for chip detection. However register is
> named TX_CONFIG_V2, even though only bit 31 is left for actual tx configuration.
> Is the register name misleading, or is the mask incorrect?
@Heiner (double checking to avoid more confusion on my side): are you
fine with the register name? It's unclear to me if you are fine with
just the 2 merged patches or even with this one.
Thanks,
Paolo
next prev parent reply other threads:[~2026-01-15 10:51 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-12 2:45 [PATCH net-next v1 0/3] r8169: add dash/LTR/RTL9151AS support javen
2026-01-12 2:45 ` [PATCH net-next v1 1/3] r8169: add DASH support for RTL8127AP javen
2026-01-12 2:45 ` [PATCH net-next v1 2/3] r8169: enable LTR support javen
2026-01-12 2:45 ` [PATCH net-next v1 3/3] r8169: add support for chip RTL9151AS javen
2026-01-12 22:20 ` Heiner Kallweit
2026-01-13 2:18 ` javen
2026-01-15 10:51 ` Paolo Abeni [this message]
2026-01-15 20:15 ` Heiner Kallweit
2026-01-22 1:42 ` 许俊伟
2026-01-24 21:24 ` Heiner Kallweit
2026-01-13 10:00 ` [PATCH net-next v1 0/3] r8169: add dash/LTR/RTL9151AS support patchwork-bot+netdevbpf
2026-01-13 10:01 ` Paolo Abeni
2026-01-13 17:15 ` Heiner Kallweit
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