From: luoxuanqiang <xuanqiang.luo@linux.dev>
To: Andrew Lunn <andrew@lunn.ch>
Cc: Richard Cochran <richardcochran@gmail.com>,
netdev@vger.kernel.org, kuba@kernel.org, hkallweit1@gmail.com,
linux@armlinux.org.uk, davem@davemloft.net, edumazet@google.com,
pabeni@redhat.com, maxime.chevallier@bootlin.com,
luoxuanqiang@kylinos.cn
Subject: Re: [PATCH net v4 0/4] net: phy: dp83640: fix shared clock lifetime and probe error cleanup
Date: Wed, 12 Aug 2026 11:04:01 +0800 [thread overview]
Message-ID: <a392ea16-f35e-4f5b-b6f7-7f9b584c49bd@linux.dev> (raw)
In-Reply-To: <dea76ffc-4424-45e2-8871-7ef29fc31958@lunn.ch>
在 2026/8/12 00:35, Andrew Lunn 写道:
> On Tue, Aug 11, 2026 at 10:34:17PM +0800, luoxuanqiang wrote:
>> Hi Richard,
>>
>> 在 2026/8/11 21:11, Richard Cochran 写道:
>>> On Fri, Aug 07, 2026 at 03:07:25PM +0800, xuanqiang.luo@linux.dev wrote:
>>>> From: Xuanqiang Luo <xuanqiang.luo@linux.dev>
>>>>
>>>> The DP83640 driver shares one PTP clock between all PHYs on the same MII
>>>> bus.
>>>>
>>>> Its driver-local clock lookup and removal scheme can leak the shared clock
>>>> on probe failure or free it while another probe is acquiring it.
>>> Is this an actual problem that you have seen in the real world?
>>>
>>> Thanks,
>>> Richard
>> No, I have not observed this on real hardware.
> Do you at least have the real hardware, and are testing your patches
> on it?
I should clarify that I have not yet been able to fully test this series
on real hardware. I looked into putting together a suitable test setup,
but the most I would be able to get access to is a single DP83640T-EVK.
The board has only one DP83640 PHY, so it cannot fully exercise the
changes in patch 4, in particular the case where multiple DP83640 PHYs
share the same MII bus. So far, the issues identified here and the
corresponding fixes are based primarily on code inspection, rather than
on reproducing theproblems and fully validating the fixes on real
hardware.Sorry I was not clearer earlier about the lack of hardware
testing. If anyone has access to a setup with multiple DP83640 PHYs on
the same MII bus, I would appreciate any help testing this series,
especially the shared-clock lifetime changes in patch 4. Thanks,
Xuanqiang
prev parent reply other threads:[~2026-08-12 3:05 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-07 7:07 [PATCH net v4 0/4] net: phy: dp83640: fix shared clock lifetime and probe error cleanup xuanqiang.luo
2026-08-07 7:07 ` [PATCH net v4 1/4] net: phy: add PHY package locking helpers xuanqiang.luo
2026-08-07 13:36 ` Andrew Lunn
2026-08-07 7:07 ` [PATCH net v4 2/4] net: phy: dp83640: embed pin configuration in clock xuanqiang.luo
2026-08-07 13:38 ` Andrew Lunn
2026-08-07 7:07 ` [PATCH net v4 3/4] net: phy: dp83640: clear state after PTP registration failure xuanqiang.luo
2026-08-07 13:42 ` Andrew Lunn
2026-08-07 7:07 ` [PATCH net v4 4/4] net: phy: dp83640: fix per-bus clock lifetime xuanqiang.luo
2026-08-07 13:59 ` Andrew Lunn
2026-08-09 6:30 ` luoxuanqiang
2026-08-09 15:24 ` Andrew Lunn
2026-08-10 14:18 ` luoxuanqiang
2026-08-11 13:11 ` [PATCH net v4 0/4] net: phy: dp83640: fix shared clock lifetime and probe error cleanup Richard Cochran
2026-08-11 14:34 ` luoxuanqiang
2026-08-11 16:35 ` Andrew Lunn
2026-08-12 3:04 ` luoxuanqiang [this message]
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