From: Paolo Abeni <pabeni@redhat.com>
To: Rosen Penev <rosenp@gmail.com>, netdev@vger.kernel.org
Cc: Chris Snook <chris.snook@gmail.com>,
Andrew Lunn <andrew+netdev@lunn.ch>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@kernel.org>,
Jakub Kicinski <kuba@kernel.org>,
Russell King <linux@armlinux.org.uk>,
Oleksij Rempel <o.rempel@pengutronix.de>,
open list <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH net] net: ag71xx: let both QCA9550 MACs use MII, RGMII and SGMII
Date: Thu, 12 Nov 2026 12:06:49 +0100 [thread overview]
Message-ID: <a8cbf073-c242-446e-85e7-6cf9158e0b9d@redhat.com> (raw)
In-Reply-To: <20261106221607.16215-1-rosenp@gmail.com>
On 11/6/26 23:16, Rosen Penev wrote:
> The GE0_SGMII bit of the QCA955x ETH_CFG register selects which GMAC
> gets the SerDes (QCA9558 datasheet, 10.8.1): when it is clear, GMAC0
> connects as RGMII/MII and GMAC1 as SGMII, and when it is set, the other
> way around. The driver only allows the second layout, with SGMII on
> GMAC0 and RGMII/MII on GMAC1, but boards like the TP-Link Archer C7
> use the first one, with GMAC0 on RGMII.
>
> Allow MII, RGMII and SGMII on both MACs.
>
> Tested on Archer C7 v2. RGMII on port 0 of the switch works.
>
> Fixes: 0767ec042897 ("net: ag71xx: extend link validation to support other SoCs")
> Signed-off-by: Rosen Penev <rosenp@gmail.com>
IMHO this is not net material.
Applying to net-next.
/P
next prev parent reply other threads:[~2026-11-12 11:06 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-06 22:16 [PATCH net] net: ag71xx: let both QCA9550 MACs use MII, RGMII and SGMII Rosen Penev
2026-11-12 11:06 ` Paolo Abeni [this message]
2026-11-12 11:10 ` patchwork-bot+netdevbpf
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