From mboxrd@z Thu Jan 1 00:00:00 1970 From: Florian Fainelli Subject: Re: [PATCH RFC 0/4] Fixes for Marvell MII paged register access races Date: Sat, 9 Dec 2017 10:22:58 -0800 Message-ID: References: <20171208154756.GF10595@n2100.armlinux.org.uk> <20171208161714.GC30846@lunn.ch> <20171208164446.GH10595@n2100.armlinux.org.uk> Mime-Version: 1.0 Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 8bit Cc: netdev@vger.kernel.org To: Russell King - ARM Linux , Andrew Lunn Return-path: Received: from mail-ot0-f181.google.com ([74.125.82.181]:34113 "EHLO mail-ot0-f181.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750954AbdLISXA (ORCPT ); Sat, 9 Dec 2017 13:23:00 -0500 Received: by mail-ot0-f181.google.com with SMTP id o23so11694790otd.1 for ; Sat, 09 Dec 2017 10:23:00 -0800 (PST) In-Reply-To: <20171208164446.GH10595@n2100.armlinux.org.uk> Content-Language: en-US Sender: netdev-owner@vger.kernel.org List-ID: On 12/08/2017 08:44 AM, Russell King - ARM Linux wrote: > On Fri, Dec 08, 2017 at 05:17:14PM +0100, Andrew Lunn wrote: >> Hi Russell >> >>> There is an open question whether there should be generic helpers for >>> this. Generic helpers would mean: >>> >>> - Additional couple of function pointers in phy_driver to read/write the >>> paging register. This has the restriction that there must only be one >>> paging register. >> >> I must be missing something. I don't see why there is this >> restriction. Don't we just need >> >> int phy_get_page(phydev); >> int phy_set_page(phydev, page); > > The restriction occurs because a PHY may have several different > registers, and knowing which of the registers need touching becomes an > issue. We wouldn't want these accessors to needlessly access several > registers each and every time we requested an access to the page > register. > > There's also the issue of whether an "int" or whatever type we choose to > pass the "page" around is enough bits. I haven't surveyed all the PHY > drivers yet to know the answer to that. I have not come across a PHY yet that required writing a page across two 16-bit quantities, in general, the page fits within less than 16-bit actually to fit within one MDIO write. That does not mean it cannot exist obviously, but having about 32-bit x pages of address space within a PHY sounds a bit extreme. -- Florian