From: Michal Swiatkowski <michal.swiatkowski@linux.intel.com>
To: Mark Bloch <mbloch@nvidia.com>
Cc: "David S . Miller" <davem@davemloft.net>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
Eric Dumazet <edumazet@google.com>,
Andrew Lunn <andrew+netdev@lunn.ch>,
Saeed Mahameed <saeedm@nvidia.com>,
Tariq Toukan <tariqt@nvidia.com>,
Leon Romanovsky <leon@kernel.org>,
netdev@vger.kernel.org, linux-rdma@vger.kernel.org,
linux-kernel@vger.kernel.org, Chris Mi <cmi@nvidia.com>,
Roi Dayan <roid@nvidia.com>, Maor Gottlieb <maorg@nvidia.com>
Subject: Re: [PATCH net 5/5] net/mlx5: E-switch, Fix error handling for enabling roce
Date: Wed, 23 Apr 2025 12:17:56 +0200 [thread overview]
Message-ID: <aAi+VAcQEYOhQSnF@mev-dev.igk.intel.com> (raw)
In-Reply-To: <20250423083611.324567-6-mbloch@nvidia.com>
On Wed, Apr 23, 2025 at 11:36:11AM +0300, Mark Bloch wrote:
> From: Chris Mi <cmi@nvidia.com>
>
> The cited commit assumes enabling roce always succeeds. But it is
> not true. Add error handling for it.
>
> Fixes: 80f09dfc237f ("net/mlx5: Eswitch, enable RoCE loopback traffic")
> Signed-off-by: Chris Mi <cmi@nvidia.com>
> Reviewed-by: Roi Dayan <roid@nvidia.com>
> Reviewed-by: Maor Gottlieb <maorg@nvidia.com>
> Signed-off-by: Mark Bloch <mbloch@nvidia.com>
> ---
> .../net/ethernet/mellanox/mlx5/core/eswitch_offloads.c | 5 ++++-
> drivers/net/ethernet/mellanox/mlx5/core/rdma.c | 9 +++++----
> drivers/net/ethernet/mellanox/mlx5/core/rdma.h | 4 ++--
> 3 files changed, 11 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c b/drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c
> index a6a8eea5980c..0e3a977d5332 100644
> --- a/drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c
> +++ b/drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c
> @@ -3533,7 +3533,9 @@ int esw_offloads_enable(struct mlx5_eswitch *esw)
> int err;
>
> mutex_init(&esw->offloads.termtbl_mutex);
> - mlx5_rdma_enable_roce(esw->dev);
> + err = mlx5_rdma_enable_roce(esw->dev);
> + if (err)
> + goto err_roce;
>
> err = mlx5_esw_host_number_init(esw);
> if (err)
> @@ -3594,6 +3596,7 @@ int esw_offloads_enable(struct mlx5_eswitch *esw)
> esw_offloads_metadata_uninit(esw);
> err_metadata:
> mlx5_rdma_disable_roce(esw->dev);
> +err_roce:
> mutex_destroy(&esw->offloads.termtbl_mutex);
> return err;
> }
> diff --git a/drivers/net/ethernet/mellanox/mlx5/core/rdma.c b/drivers/net/ethernet/mellanox/mlx5/core/rdma.c
> index f585ef5a3424..5c552b71e371 100644
> --- a/drivers/net/ethernet/mellanox/mlx5/core/rdma.c
> +++ b/drivers/net/ethernet/mellanox/mlx5/core/rdma.c
> @@ -140,17 +140,17 @@ void mlx5_rdma_disable_roce(struct mlx5_core_dev *dev)
> mlx5_nic_vport_disable_roce(dev);
> }
>
> -void mlx5_rdma_enable_roce(struct mlx5_core_dev *dev)
> +int mlx5_rdma_enable_roce(struct mlx5_core_dev *dev)
> {
> int err;
>
> if (!MLX5_CAP_GEN(dev, roce))
> - return;
> + return 0;
>
> err = mlx5_nic_vport_enable_roce(dev);
> if (err) {
> mlx5_core_err(dev, "Failed to enable RoCE: %d\n", err);
> - return;
> + return err;
> }
>
> err = mlx5_rdma_add_roce_addr(dev);
> @@ -165,10 +165,11 @@ void mlx5_rdma_enable_roce(struct mlx5_core_dev *dev)
> goto del_roce_addr;
> }
>
> - return;
> + return err;
>
> del_roce_addr:
> mlx5_rdma_del_roce_addr(dev);
> disable_roce:
> mlx5_nic_vport_disable_roce(dev);
> + return err;
> }
> diff --git a/drivers/net/ethernet/mellanox/mlx5/core/rdma.h b/drivers/net/ethernet/mellanox/mlx5/core/rdma.h
> index 750cff2a71a4..3d9e76c3d42f 100644
> --- a/drivers/net/ethernet/mellanox/mlx5/core/rdma.h
> +++ b/drivers/net/ethernet/mellanox/mlx5/core/rdma.h
> @@ -8,12 +8,12 @@
>
> #ifdef CONFIG_MLX5_ESWITCH
>
> -void mlx5_rdma_enable_roce(struct mlx5_core_dev *dev);
> +int mlx5_rdma_enable_roce(struct mlx5_core_dev *dev);
> void mlx5_rdma_disable_roce(struct mlx5_core_dev *dev);
>
> #else /* CONFIG_MLX5_ESWITCH */
>
> -static inline void mlx5_rdma_enable_roce(struct mlx5_core_dev *dev) {}
> +static inline int mlx5_rdma_enable_roce(struct mlx5_core_dev *dev) { return 0; }
> static inline void mlx5_rdma_disable_roce(struct mlx5_core_dev *dev) {}
>
> #endif /* CONFIG_MLX5_ESWITCH */
Reviewed-by: Michal Swiatkowski <michal.swiatkowski@linux.intel.com>
> --
> 2.34.1
next prev parent reply other threads:[~2025-04-23 10:18 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-23 8:36 [PATCH net 0/5] mlx5 misc fixes 2025-04-23 Mark Bloch
2025-04-23 8:36 ` [PATCH net 1/5] net/mlx5e: Use custom tunnel header for vxlan gbp Mark Bloch
2025-04-23 10:34 ` Michal Swiatkowski
2025-04-23 8:36 ` [PATCH net 2/5] net/mlx5: E-Switch, Initialize MAC Address for Default GID Mark Bloch
2025-04-23 10:31 ` Michal Swiatkowski
2025-04-23 11:20 ` Mark Bloch
2025-04-23 12:00 ` Michal Swiatkowski
2025-04-23 8:36 ` [PATCH net 3/5] net/mlx5e: TC, Continue the attr process even if encap entry is invalid Mark Bloch
2025-04-23 8:36 ` [PATCH net 4/5] net/mlx5e: Fix lock order in mlx5e_tx_reporter_ptpsq_unhealthy_recover Mark Bloch
2025-04-23 8:36 ` [PATCH net 5/5] net/mlx5: E-switch, Fix error handling for enabling roce Mark Bloch
2025-04-23 10:17 ` Michal Swiatkowski [this message]
2025-04-25 19:01 ` [PATCH net 0/5] mlx5 misc fixes 2025-04-23 patchwork-bot+netdevbpf
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=aAi+VAcQEYOhQSnF@mev-dev.igk.intel.com \
--to=michal.swiatkowski@linux.intel.com \
--cc=andrew+netdev@lunn.ch \
--cc=cmi@nvidia.com \
--cc=davem@davemloft.net \
--cc=edumazet@google.com \
--cc=kuba@kernel.org \
--cc=leon@kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-rdma@vger.kernel.org \
--cc=maorg@nvidia.com \
--cc=mbloch@nvidia.com \
--cc=netdev@vger.kernel.org \
--cc=pabeni@redhat.com \
--cc=roid@nvidia.com \
--cc=saeedm@nvidia.com \
--cc=tariqt@nvidia.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).