From: Michal Swiatkowski <michal.swiatkowski@linux.intel.com>
To: Mark Bloch <mbloch@nvidia.com>
Cc: Michal Swiatkowski <michal.swiatkowski@linux.intel.com>,
"David S . Miller" <davem@davemloft.net>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
Eric Dumazet <edumazet@google.com>,
Andrew Lunn <andrew+netdev@lunn.ch>,
Saeed Mahameed <saeedm@nvidia.com>,
Tariq Toukan <tariqt@nvidia.com>,
Leon Romanovsky <leon@kernel.org>,
netdev@vger.kernel.org, linux-rdma@vger.kernel.org,
linux-kernel@vger.kernel.org, Maor Gottlieb <maorg@nvidia.com>
Subject: Re: [PATCH net 2/5] net/mlx5: E-Switch, Initialize MAC Address for Default GID
Date: Wed, 23 Apr 2025 14:00:00 +0200 [thread overview]
Message-ID: <aAjWNaBKzKxeHbks@mev-dev.igk.intel.com> (raw)
In-Reply-To: <77df78bb-8bcf-42e8-b307-cc8bbe97254c@nvidia.com>
On Wed, Apr 23, 2025 at 02:20:56PM +0300, Mark Bloch wrote:
>
>
> On 23/04/2025 13:31, Michal Swiatkowski wrote:
> > On Wed, Apr 23, 2025 at 11:36:08AM +0300, Mark Bloch wrote:
> >> From: Maor Gottlieb <maorg@nvidia.com>
> >>
> >> Initialize the source MAC address when creating the default GID entry.
> >> Since this entry is used only for loopback traffic, it only needs to
> >> be a unicast address. A zeroed-out MAC address is sufficient for this
> >> purpose.
> >> Without this fix, random bits would be assigned as the source address.
> >> If these bits formed a multicast address, the firmware would return an
> >> error, preventing the user from switching to switchdev mode:
> >>
> >> Error: mlx5_core: Failed setting eswitch to offloads.
> >> kernel answers: Invalid argument
> >>
> >> Fixes: 80f09dfc237f ("net/mlx5: Eswitch, enable RoCE loopback traffic")
> >> Signed-off-by: Maor Gottlieb <maorg@nvidia.com>
> >> Signed-off-by: Mark Bloch <mbloch@nvidia.com>
> >> ---
> >> drivers/net/ethernet/mellanox/mlx5/core/rdma.c | 2 +-
> >> 1 file changed, 1 insertion(+), 1 deletion(-)
> >>
> >> diff --git a/drivers/net/ethernet/mellanox/mlx5/core/rdma.c b/drivers/net/ethernet/mellanox/mlx5/core/rdma.c
> >> index a42f6cd99b74..f585ef5a3424 100644
> >> --- a/drivers/net/ethernet/mellanox/mlx5/core/rdma.c
> >> +++ b/drivers/net/ethernet/mellanox/mlx5/core/rdma.c
> >> @@ -118,8 +118,8 @@ static void mlx5_rdma_make_default_gid(struct mlx5_core_dev *dev, union ib_gid *
> >>
> >> static int mlx5_rdma_add_roce_addr(struct mlx5_core_dev *dev)
> >> {
> >> + u8 mac[ETH_ALEN] = {};
> >
> > Won't it be helpful to add comment that it needs to be unicast and 0 is
> > a valid MAC?
>
> That's why the commit message has: "it only needs to
> be a unicast address. A zeroed-out MAC address is sufficient for this
> purpose."
>
> I feel this is good enough.
Make sense, thanks
>
> >
> > Anyway,
> > Reviewed-by: Michal Swiatkowski <michal.swiatkowski@linux.intel.com>
>
> Thanks!
>
> >
> > hw_id in mlx5_rdma_make_default_gid() is also used without assigining.
> > Is it fine to have random bits there?
>
> We pass hw_id to mlx5_query_mac_address() which fills it.
> However, there's a separate issue where mlx5_query_mac_address()
> might fail, this is unlikely, but still possible.
> We'll address that in a follow-up patch.
>
> Thanks for the review!
>
> Mark
>
> >
> > Thanks
> >
> >> union ib_gid gid;
> >> - u8 mac[ETH_ALEN];
> >>
> >> mlx5_rdma_make_default_gid(dev, &gid);
> >> return mlx5_core_roce_gid_set(dev, 0,
> >> --
> >> 2.34.1
>
next prev parent reply other threads:[~2025-04-23 12:00 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-23 8:36 [PATCH net 0/5] mlx5 misc fixes 2025-04-23 Mark Bloch
2025-04-23 8:36 ` [PATCH net 1/5] net/mlx5e: Use custom tunnel header for vxlan gbp Mark Bloch
2025-04-23 10:34 ` Michal Swiatkowski
2025-04-23 8:36 ` [PATCH net 2/5] net/mlx5: E-Switch, Initialize MAC Address for Default GID Mark Bloch
2025-04-23 10:31 ` Michal Swiatkowski
2025-04-23 11:20 ` Mark Bloch
2025-04-23 12:00 ` Michal Swiatkowski [this message]
2025-04-23 8:36 ` [PATCH net 3/5] net/mlx5e: TC, Continue the attr process even if encap entry is invalid Mark Bloch
2025-04-23 8:36 ` [PATCH net 4/5] net/mlx5e: Fix lock order in mlx5e_tx_reporter_ptpsq_unhealthy_recover Mark Bloch
2025-04-23 8:36 ` [PATCH net 5/5] net/mlx5: E-switch, Fix error handling for enabling roce Mark Bloch
2025-04-23 10:17 ` Michal Swiatkowski
2025-04-25 19:01 ` [PATCH net 0/5] mlx5 misc fixes 2025-04-23 patchwork-bot+netdevbpf
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