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X-CSE-ConnectionGUID: 9PaYg9bJTEe8s8ZpLun1EQ== X-CSE-MsgGUID: cacKaEc1QZWCreLkcoT92w== X-IronPort-AV: E=McAfee;i="6800,10657,11493"; a="54990013" X-IronPort-AV: E=Sophos;i="6.16,315,1744095600"; d="scan'208";a="54990013" Received: from fmviesa001.fm.intel.com ([10.60.135.141]) by fmvoesa108.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Jul 2025 02:25:17 -0700 X-CSE-ConnectionGUID: khmRv9vYRvSjNH+DH50fJg== X-CSE-MsgGUID: eFyp1+WeR6SXM5VzHx5kNg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.16,315,1744095600"; d="scan'208";a="188455816" Received: from mev-dev.igk.intel.com ([10.237.112.144]) by smtpauth.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Jul 2025 02:25:14 -0700 Date: Wed, 16 Jul 2025 11:24:07 +0200 From: Michal Swiatkowski To: Subbaraya Sundeep Cc: andrew+netdev@lunn.ch, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni4redhat.com@mx0a-0016f401.pphosted.com, horms@kernel.org, gakula@marvell.com, hkelam@marvell.com, bbhushan2@marvell.com, jerinj@marvell.com, lcherian@marvell.com, sgoutham@marvell.com, netdev@vger.kernel.org Subject: Re: [net-next PATCH v2 01/11] octeontx2-af: Simplify context writing and reading to hardware Message-ID: References: <1752598924-32705-1-git-send-email-sbhatta@marvell.com> <1752598924-32705-2-git-send-email-sbhatta@marvell.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1752598924-32705-2-git-send-email-sbhatta@marvell.com> On Tue, Jul 15, 2025 at 10:31:54PM +0530, Subbaraya Sundeep wrote: > Simplify NIX context reading and writing by using hardware > maximum context size instead of using individual sizes of > each context type. > > Signed-off-by: Subbaraya Sundeep > --- > .../ethernet/marvell/octeontx2/af/rvu_nix.c | 46 ++++++++++--------- > .../marvell/octeontx2/af/rvu_struct.h | 7 ++- > 2 files changed, 30 insertions(+), 23 deletions(-) > > diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c > index bdf4d852c15d..48d44911b663 100644 > --- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c > +++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c > @@ -17,6 +17,8 @@ > #include "lmac_common.h" > #include "rvu_npc_hash.h" > > +#define NIX_MAX_CTX_SIZE 128 > + [...] > > return 0; > diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_struct.h b/drivers/net/ethernet/marvell/octeontx2/af/rvu_struct.h > index 0596a3ac4c12..8a66f53a7658 100644 > --- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_struct.h > +++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_struct.h > @@ -370,6 +370,8 @@ struct nix_cq_ctx_s { > u64 qsize : 4; > u64 cq_err_int : 8; > u64 cq_err_int_ena : 8; > + /* Ensure all context sizes are minimum 128 bytes */ > + u64 padding[12]; > }; > > /* CN10K NIX Receive queue context structure */ > @@ -672,7 +674,8 @@ struct nix_sq_ctx_s { > struct nix_rsse_s { > uint32_t rq : 20; > uint32_t reserved_20_31 : 12; > - > + /* Ensure all context sizes are minimum 128 bytes */ > + u64 padding[15]; > }; > > /* NIX receive multicast/mirror entry structure */ > @@ -684,6 +687,8 @@ struct nix_rx_mce_s { > uint64_t rsvd_31_24 : 8; > uint64_t pf_func : 16; > uint64_t next : 16; > + /* Ensure all context sizes are minimum 128 bytes */ > + u64 padding[15]; > }; To be sure that each used structures are correct size you can use static assertion, sth like: static_assert((NIC_MAX_CTX_SIZE) == sizeof(struct X)) Thanks > > enum nix_band_prof_layers { > -- > 2.34.1 >