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From: "Russell King (Oracle)" <linux@armlinux.org.uk>
To: Alexander Wilhelm <alexander.wilhelm@westermo.com>
Cc: Vladimir Oltean <olteanv@gmail.com>, Andrew Lunn <andrew@lunn.ch>,
	Heiner Kallweit <hkallweit1@gmail.com>,
	"David S. Miller" <davem@davemloft.net>,
	Eric Dumazet <edumazet@google.com>,
	Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
	netdev@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: Aquantia PHY in OCSGMII mode?
Date: Fri, 1 Aug 2025 13:23:44 +0100	[thread overview]
Message-ID: <aIyx0OLWGw5zKarX@shell.armlinux.org.uk> (raw)
In-Reply-To: <aIytuIUN+BSy2Xug@FUE-ALEWI-WINX>

On Fri, Aug 01, 2025 at 02:06:16PM +0200, Alexander Wilhelm wrote:
> Am Fri, Aug 01, 2025 at 12:58:23PM +0100 schrieb Russell King (Oracle):
> > On Fri, Aug 01, 2025 at 01:54:29PM +0200, Alexander Wilhelm wrote:
> > > Am Fri, Aug 01, 2025 at 02:01:06PM +0300 schrieb Vladimir Oltean:
> > > > On Thu, Jul 31, 2025 at 08:26:43PM +0100, Russell King (Oracle) wrote:
> > > > > and this works. So... we could actually reconfigure the PHY independent
> > > > > of what was programmed into the firmware.
> > > > 
> > > > It does work indeed, the trouble will be adding this code to the common
> > > > mainline kernel driver and then watching various boards break after their
> > > > known-good firmware provisioning was overwritten, from a source of unknown
> > > > applicability to their system.
> > > 
> > > You're right. I've now selected a firmware that uses a different provisioning
> > > table, which already configures the PHY for 2500BASE-X with Flow Control.
> > > According to the documentation, it should support all modes: 10M, 100M, 1G, and
> > > 2.5G.
> > > 
> > > It seems the issue lies with the MAC, as it doesn't appear to handle the
> > > configured PHY_INTERFACE_MODE_2500BASEX correctly. I'm currently investigating
> > > this further.
> > 
> > Which MAC driver, and is it using phylink?
> 
> If I understand it correclty, then yes. It is an Freescale FMAN driver that is
> called through phylink callbacks like the following:
> 
>     static const struct phylink_mac_ops memac_mac_ops = {
>             .validate = memac_validate,
>             .mac_select_pcs = memac_select_pcs,
>             .mac_prepare = memac_prepare,
>             .mac_config = memac_mac_config,
>             .mac_link_up = memac_link_up,
>             .mac_link_down = memac_link_down,
>     };

Thanks.

It looks like memac_select_pcs() and memac_prepare() fail to
handle 2500BASEX despite memac_initialization() suggesting the
SGMII PCS supports 2500BASEX.

It would also be good if the driver can also use
pcs->supported_interfaces which states which modes the PCS layer
supports as well.

-- 
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTP is here! 80Mbps down 10Mbps up. Decent connectivity at last!

  reply	other threads:[~2025-08-01 12:23 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-07-31 14:59 Aquantia PHY in OCSGMII mode? Alexander Wilhelm
2025-07-31 15:14 ` Andrew Lunn
2025-07-31 16:02   ` Russell King (Oracle)
2025-08-01  5:44     ` Alexander Wilhelm
2025-08-04 14:53       ` Andrew Lunn
2025-07-31 17:16 ` Vladimir Oltean
2025-07-31 19:26   ` Russell King (Oracle)
2025-08-01  5:50     ` Alexander Wilhelm
2025-08-01 11:01     ` Vladimir Oltean
2025-08-01 11:54       ` Alexander Wilhelm
2025-08-01 11:58         ` Russell King (Oracle)
2025-08-01 12:06           ` Alexander Wilhelm
2025-08-01 12:23             ` Russell King (Oracle) [this message]
2025-08-01 12:36               ` Alexander Wilhelm
2025-08-01 13:04               ` Vladimir Oltean
2025-08-01 14:02                 ` Russell King (Oracle)
2025-08-01 14:37                   ` Vladimir Oltean
2025-08-04  6:17                 ` Alexander Wilhelm
2025-08-04 10:01                   ` Vladimir Oltean
2025-08-04 13:01                     ` Alexander Wilhelm
2025-08-04 13:41                       ` Vladimir Oltean
2025-08-04 14:47                         ` Alexander Wilhelm
2025-08-04 16:00                           ` Vladimir Oltean
2025-08-04 16:02                             ` Vladimir Oltean
2025-08-05  7:59                               ` Alexander Wilhelm
2025-08-05 10:20                                 ` Vladimir Oltean
2025-08-05 12:44                                   ` Alexander Wilhelm
2025-08-06 14:58                                     ` Vladimir Oltean
2025-08-07  5:56                                       ` Alexander Wilhelm
2025-08-27  5:57                                       ` Alexander Wilhelm
2025-08-27  7:31                                         ` Vladimir Oltean
2025-08-27  8:41                                           ` Alexander Wilhelm
2025-08-27  8:47                                             ` Russell King (Oracle)
2025-08-27  9:03                                               ` Alexander Wilhelm
2025-08-27  9:13                                                 ` Russell King (Oracle)
2025-08-28  9:28                                                   ` Vladimir Oltean
2025-08-27  8:08                                         ` Russell King (Oracle)
2025-08-27  8:32                                           ` Alexander Wilhelm
2025-08-27  8:45                                             ` Russell King (Oracle)
2025-08-04 14:22                       ` Russell King (Oracle)
2025-08-04 14:51                         ` Alexander Wilhelm
2025-08-04 14:56                         ` Vladimir Oltean
2025-08-01 11:13     ` Vladimir Oltean
2025-08-01  5:53   ` Alexander Wilhelm

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