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From: Jisheng Zhang <jszhang@kernel.org>
To: Andrew Lunn <andrew@lunn.ch>,
	Russell King <linux@armlinux.org.uk>,
	Florian Fainelli <florian.fainelli@broadcom.com>,
	Jakub Kicinski <kuba@kernel.org>,
	"David S. Miller" <davem@davemloft.net>
Cc: netdev@vger.kernel.org
Subject: [RFC] mdio demux multiplexer driver
Date: Wed, 13 Aug 2025 08:58:06 +0800	[thread overview]
Message-ID: <aJvjHrDM1U5_r1gq@xhacker> (raw)

Hi,

Assume we have the following implementation:
          ----------
          |mmio reg|
	  ----------
             |
 --------    |      -------
 | MAC0 |--MDIO-----| PHY |
 -------- |     |   -------
          |     |
 -------- |     |   -------
 | MAC1 |--     ----| PHY |
 --------           -------

Both MAC0 and MAC1 have MDIO bus masters, and tie together to
a single set of clock and data lines, which go to some PHYs. While
there's a mmio reg to control which MAC mdio master can operate
the single mdio clock and data lines, so only one MAC can operate
the mdio clock and data lines.

We also need to fully support three use cases: only MAC0 + PHY is used
on board; only MAC1 + PHY is used on board; MAC0 + MAC1 + PHYs are
all used.

How can this be modeled in current mdio? It looks like a kind of demux,
so my initial plan is implement a mdio-demux driver, which firstly
switch mdio master then call the master's corresponding ops such as
read, write, read_c45, write_c45 and so on. What do you think about
this RFC? Any comment/suggestion is appreciated!

thanks

             reply	other threads:[~2025-08-13  1:15 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-08-13  0:58 Jisheng Zhang [this message]
2025-08-15  3:51 ` [RFC] mdio demux multiplexer driver Andrew Lunn
2025-08-16  5:26   ` Jisheng Zhang
2025-08-16 14:52     ` Andrew Lunn
2025-08-18 15:39       ` Jisheng Zhang
2025-08-18 16:21         ` Russell King (Oracle)
2025-08-18 16:27         ` Andrew Lunn
2025-08-20 15:44           ` Jisheng Zhang

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