Re: [PATCH v6 net-next 15/17] net: enetc: add PTP synchronization support for ENETC v4

[Frank Li <Frank.li@nxp.com>]

On Wed, Aug 27, 2025 at 02:33:30PM +0800, Wei Fang wrote:
> Regarding PTP, ENETC v4 has some changes compared to ENETC v1 (LS1028A),
> mainly as follows.
>
> 1. ENETC v4 uses a different PTP driver, so the way to get phc_index is
> different from LS1028A. Therefore, enetc_get_ts_info() has been modified
> appropriately to be compatible with ENETC v1 and v4.
>
> 2. The PMa_SINGLE_STEP register has changed in ENETC v4, not only the
> register offset, but also some register fields. Therefore, two helper
> functions are added, enetc_set_one_step_ts() for ENETC v1 and
> enetc4_set_one_step_ts() for ENETC v4.
>
> 3. Since the generic helper functions from ptp_clock are used to get
> the PHC index of the PTP clock, so FSL_ENETC_CORE depends on Kconfig
> symbol "PTP_1588_CLOCK_OPTIONAL". But FSL_ENETC_CORE can only be
> selected, so add the dependency to FSL_ENETC, FSL_ENETC_VF and
> NXP_ENETC4. Perhaps the best approach would be to change FSL_ENETC_CORE
> to a visible menu entry. Then make FSL_ENETC, FSL_ENETC_VF, and
> NXP_ENETC4 depend on it, but this is not the goal of this patch, so this
> may be changed in the future.
>
> Signed-off-by: Wei Fang <wei.fang@nxp.com>
>
> ---
...
>  	tristate "ENETC4 PF driver"
> +	depends on PTP_1588_CLOCK_OPTIONAL

Not sure if select PTP_1588_CLOCK_OPTIONAL is better.

>  	depends on PCI_MSI
>  	select FSL_ENETC_CORE
>  	select FSL_ENETC_MDIO
> @@ -62,6 +64,7 @@ config NXP_ENETC4
>
>  config FSL_ENETC_VF
>  	tristate "ENETC VF driver"
> +	depends on PTP_1588_CLOCK_OPTIONAL
>  	depends on PCI_MSI
>  	select FSL_ENETC_CORE
>  	select FSL_ENETC_MDIO
> diff --git a/drivers/net/ethernet/freescale/enetc/enetc.c b/drivers/net/ethernet/freescale/enetc/enetc.c
> index 25379ac7d69d..6dbc9cc811a0 100644
> --- a/drivers/net/ethernet/freescale/enetc/enetc.c
> +++ b/drivers/net/ethernet/freescale/enetc/enetc.c
> @@ -221,6 +221,31 @@ static void enetc_unwind_tx_frame(struct enetc_bdr *tx_ring, int count, int i)
>  	}
>  }
>
...

>  #ifdef CONFIG_FSL_ENETC_QOS
>  int enetc_qos_query_caps(struct net_device *ndev, void *type_data);
>  int enetc_setup_tc_taprio(struct net_device *ndev, void *type_data);
> diff --git a/drivers/net/ethernet/freescale/enetc/enetc4_hw.h b/drivers/net/ethernet/freescale/enetc/enetc4_hw.h
> index aa25b445d301..a8113c9057eb 100644
> --- a/drivers/net/ethernet/freescale/enetc/enetc4_hw.h
> +++ b/drivers/net/ethernet/freescale/enetc/enetc4_hw.h
> @@ -171,6 +171,12 @@
>  /* Port MAC 0/1 Pause Quanta Threshold Register */
>  #define ENETC4_PM_PAUSE_THRESH(mac)	(0x5064 + (mac) * 0x400)
>
> +#define ENETC4_PM_SINGLE_STEP(mac)	(0x50c0 + (mac) * 0x400)
> +#define  PM_SINGLE_STEP_CH		BIT(6)
> +#define  PM_SINGLE_STEP_OFFSET		GENMASK(15, 7)
> +#define   PM_SINGLE_STEP_OFFSET_SET(o)  FIELD_PREP(PM_SINGLE_STEP_OFFSET, o)

missed alignment

Reviewed-by: Frank Li <Frank.Li@nxp.com>

> +#define  PM_SINGLE_STEP_EN		BIT(31)
> +
>  /* Port MAC 0 Interface Mode Control Register */
>  #define ENETC4_PM_IF_MODE(mac)		(0x5300 + (mac) * 0x400)
>  #define  PM_IF_MODE_IFMODE		GENMASK(2, 0)
> diff --git a/drivers/net/ethernet/freescale/enetc/enetc4_pf.c b/drivers/net/ethernet/freescale/enetc/enetc4_pf.c
> index 38fb81db48c2..2e07b9b746e1 100644
> --- a/drivers/net/ethernet/freescale/enetc/enetc4_pf.c
> +++ b/drivers/net/ethernet/freescale/enetc/enetc4_pf.c
> @@ -569,6 +569,9 @@ static const struct net_device_ops enetc4_ndev_ops = {

...
>
>  void enetc_set_ethtool_ops(struct net_device *ndev)
> --
> 2.34.1
>