From: Daniel Golle <daniel@makrotopia.org>
To: Andrew Lunn <andrew@lunn.ch>, Vladimir Oltean <olteanv@gmail.com>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
Hauke Mehrtens <hauke@hauke-m.de>,
Simon Horman <horms@kernel.org>,
Russell King <linux@armlinux.org.uk>,
Florian Fainelli <f.fainelli@gmail.com>,
Arkadi Sharshevsky <arkadis@mellanox.com>,
linux-kernel@vger.kernel.org, netdev@vger.kernel.org
Cc: Andreas Schirm <andreas.schirm@siemens.com>,
Lukas Stockmann <lukas.stockmann@siemens.com>,
Alexander Sverdlin <alexander.sverdlin@siemens.com>,
Peter Christen <peter.christen@siemens.com>,
Avinash Jayaraman <ajayaraman@maxlinear.com>,
Bing tao Xu <bxu@maxlinear.com>, Liang Xu <lxu@maxlinear.com>,
Juraj Povazanec <jpovazanec@maxlinear.com>,
"Fanni (Fang-Yi) Chan" <fchan@maxlinear.com>,
"Benny (Ying-Tsan) Weng" <yweng@maxlinear.com>,
"Livia M. Rosu" <lrosu@maxlinear.com>,
John Crispin <john@phrozen.org>
Subject: [PATCH RFC net-next 06/23] net: dsa: lantiq_gswip: load model-specific microcode
Date: Sat, 16 Aug 2025 20:52:07 +0100 [thread overview]
Message-ID: <aKDhZ9LQi63Qadvh@pidgin.makrotopia.org> (raw)
Load microcode as specified in struct hw_info instead of relying on
a single array of instructions. This allows loading different microcode
for the MaxLinear GSW1xx family.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
---
drivers/net/dsa/lantiq_gswip.c | 14 +++++++++-----
drivers/net/dsa/lantiq_gswip.h | 9 +++++++++
drivers/net/dsa/lantiq_pce.h | 9 ++-------
3 files changed, 20 insertions(+), 12 deletions(-)
diff --git a/drivers/net/dsa/lantiq_gswip.c b/drivers/net/dsa/lantiq_gswip.c
index 86e02ac0c221..355b8eb8ab9b 100644
--- a/drivers/net/dsa/lantiq_gswip.c
+++ b/drivers/net/dsa/lantiq_gswip.c
@@ -501,15 +501,15 @@ static int gswip_pce_load_microcode(struct gswip_priv *priv)
GSWIP_PCE_TBL_CTRL_OPMOD_ADWR, GSWIP_PCE_TBL_CTRL);
gswip_switch_w(priv, 0, GSWIP_PCE_TBL_MASK);
- for (i = 0; i < ARRAY_SIZE(gswip_pce_microcode); i++) {
+ for (i = 0; i < priv->hw_info->pce_microcode_size; i++) {
gswip_switch_w(priv, i, GSWIP_PCE_TBL_ADDR);
- gswip_switch_w(priv, gswip_pce_microcode[i].val_0,
+ gswip_switch_w(priv, (*priv->hw_info->pce_microcode)[i].val_0,
GSWIP_PCE_TBL_VAL(0));
- gswip_switch_w(priv, gswip_pce_microcode[i].val_1,
+ gswip_switch_w(priv, (*priv->hw_info->pce_microcode)[i].val_1,
GSWIP_PCE_TBL_VAL(1));
- gswip_switch_w(priv, gswip_pce_microcode[i].val_2,
+ gswip_switch_w(priv, (*priv->hw_info->pce_microcode)[i].val_2,
GSWIP_PCE_TBL_VAL(2));
- gswip_switch_w(priv, gswip_pce_microcode[i].val_3,
+ gswip_switch_w(priv, (*priv->hw_info->pce_microcode)[i].val_3,
GSWIP_PCE_TBL_VAL(3));
/* start the table access: */
@@ -2011,6 +2011,8 @@ static const struct gswip_hw_info gswip_xrx200 = {
.phy_ports = BIT(2) | BIT(3) | BIT(4) | BIT(5),
.mii_ports = BIT(0) | BIT(5),
.phylink_get_caps = gswip_xrx200_phylink_get_caps,
+ .pce_microcode = &gswip_pce_microcode,
+ .pce_microcode_size = ARRAY_SIZE(gswip_pce_microcode),
};
static const struct gswip_hw_info gswip_xrx300 = {
@@ -2019,6 +2021,8 @@ static const struct gswip_hw_info gswip_xrx300 = {
.phy_ports = BIT(1) | BIT(2) | BIT(3) | BIT(4) | BIT(5),
.mii_ports = BIT(0) | BIT(1) | BIT(5),
.phylink_get_caps = gswip_xrx300_phylink_get_caps,
+ .pce_microcode = &gswip_pce_microcode,
+ .pce_microcode_size = ARRAY_SIZE(gswip_pce_microcode),
};
static const struct of_device_id gswip_of_match[] = {
diff --git a/drivers/net/dsa/lantiq_gswip.h b/drivers/net/dsa/lantiq_gswip.h
index 3b19963f2073..e1384b22bafa 100644
--- a/drivers/net/dsa/lantiq_gswip.h
+++ b/drivers/net/dsa/lantiq_gswip.h
@@ -214,12 +214,21 @@
*/
#define GSWIP_MAX_PACKET_LENGTH 2400
+struct gswip_pce_microcode {
+ u16 val_3;
+ u16 val_2;
+ u16 val_1;
+ u16 val_0;
+};
+
struct gswip_hw_info {
int max_ports;
unsigned int allowed_cpu_ports;
unsigned int phy_ports;
unsigned int mii_ports;
unsigned int sgmii_ports;
+ const struct gswip_pce_microcode (*pce_microcode)[];
+ size_t pce_microcode_size;
void (*phylink_get_caps)(struct dsa_switch *ds, int port,
struct phylink_config *config);
};
diff --git a/drivers/net/dsa/lantiq_pce.h b/drivers/net/dsa/lantiq_pce.h
index e2be31f3672a..659f9a0638d9 100644
--- a/drivers/net/dsa/lantiq_pce.h
+++ b/drivers/net/dsa/lantiq_pce.h
@@ -7,6 +7,8 @@
* Copyright (C) 2017 - 2018 Hauke Mehrtens <hauke@hauke-m.de>
*/
+#include "lantiq_gswip.h"
+
enum {
OUT_MAC0 = 0,
OUT_MAC1,
@@ -74,13 +76,6 @@ enum {
FLAG_NO, /*13*/
};
-struct gswip_pce_microcode {
- u16 val_3;
- u16 val_2;
- u16 val_1;
- u16 val_0;
-};
-
#define MC_ENTRY(val, msk, ns, out, len, type, flags, ipv4_len) \
{ val, msk, ((ns) << 10 | (out) << 4 | (len) >> 1),\
((len) & 1) << 15 | (type) << 13 | (flags) << 9 | (ipv4_len) << 8 }
--
2.50.1
next reply other threads:[~2025-08-16 19:52 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-16 19:52 Daniel Golle [this message]
2025-08-17 15:29 ` [PATCH RFC net-next 06/23] net: dsa: lantiq_gswip: load model-specific microcode Andrew Lunn
2025-08-17 20:46 ` Daniel Golle
2025-08-19 0:44 ` Daniel Golle
2025-08-19 13:17 ` Andrew Lunn
2025-08-19 14:07 ` Daniel Golle
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