From: Wolfram Sang <wsa+renesas@sang-engineering.com>
To: Prabhakar <prabhakar.csengg@gmail.com>
Cc: "Clément Léger" <clement.leger@bootlin.com>,
"Andrew Lunn" <andrew@lunn.ch>,
"Heiner Kallweit" <hkallweit1@gmail.com>,
"Russell King" <linux@armlinux.org.uk>,
"David S. Miller" <davem@davemloft.net>,
"Eric Dumazet" <edumazet@google.com>,
"Jakub Kicinski" <kuba@kernel.org>,
"Paolo Abeni" <pabeni@redhat.com>,
"Geert Uytterhoeven" <geert+renesas@glider.be>,
linux-renesas-soc@vger.kernel.org, netdev@vger.kernel.org,
linux-kernel@vger.kernel.org,
"Biju Das" <biju.das.jz@bp.renesas.com>,
"Fabrizio Castro" <fabrizio.castro.jz@renesas.com>,
"Lad Prabhakar" <prabhakar.mahadev-lad.rj@bp.renesas.com>,
stable@kernel.org
Subject: Re: [PATCH net-next v2] net: pcs: rzn1-miic: Correct MODCTRL register offset
Date: Thu, 21 Aug 2025 08:51:05 +0200 [thread overview]
Message-ID: <aKbB2XZhLZ7T-y5P@shikoro> (raw)
In-Reply-To: <20250820170913.2037049-1-prabhakar.mahadev-lad.rj@bp.renesas.com>
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> I've just build-tested this patch and found this issue while working
> on a similar IP on the Renesas RZ/T2H SoC where the MODCTRL register
> offset is also at offset 0x8.
I can test this on affected hardware next week.
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next prev parent reply other threads:[~2025-08-21 6:51 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-20 17:09 [PATCH net-next v2] net: pcs: rzn1-miic: Correct MODCTRL register offset Prabhakar
2025-08-20 17:46 ` Russell King (Oracle)
2025-08-21 6:51 ` Wolfram Sang [this message]
2025-08-21 7:12 ` Geert Uytterhoeven
2025-08-22 0:22 ` Jakub Kicinski
2025-08-22 7:56 ` Lad, Prabhakar
2025-08-28 10:25 ` Wolfram Sang
2025-08-28 10:30 ` Lad, Prabhakar
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