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From: "Russell King (Oracle)" <linux@armlinux.org.uk>
To: Yao Zi <ziyao@disroot.org>
Cc: Andrew Lunn <andrew+netdev@lunn.ch>,
	"David S. Miller" <davem@davemloft.net>,
	Eric Dumazet <edumazet@google.com>,
	Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
	Jonas Karlman <jonas@kwiboo.se>,
	David Wu <david.wu@rock-chips.com>,
	Chaoyi Chen <chaoyi.chen@rock-chips.com>,
	netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org
Subject: Re: [PATCH net] net: stmmac: dwmac-rk: Ensure clk_phy doesn't contain invalid address
Date: Thu, 4 Sep 2025 11:58:07 +0100	[thread overview]
Message-ID: <aLlwv3v8ACha8b-3@shell.armlinux.org.uk> (raw)
In-Reply-To: <20250904031222.40953-3-ziyao@disroot.org>

On Thu, Sep 04, 2025 at 03:12:24AM +0000, Yao Zi wrote:
>  	if (plat->phy_node) {
>  		bsp_priv->clk_phy = of_clk_get(plat->phy_node, 0);
>  		ret = PTR_ERR_OR_ZERO(bsp_priv->clk_phy);
> -		/* If it is not integrated_phy, clk_phy is optional */
> +		/*
> +		 * If it is not integrated_phy, clk_phy is optional. But we must
> +		 * set bsp_priv->clk_phy to NULL if clk_phy isn't proivded, or
> +		 * the error code could be wrongly taken as an invalid pointer.
> +		 */

I'm concerned by this. This code is getting the first clock from the DT
description of the PHY. We don't know what type of PHY it is, or what
the DT description of that PHY might suggest that the first clock would
be.

However, we're geting it and setting it to 50MHz. What if the clock is
not what we think it is?

I'm not sure we should be delving in to some other device's DT
properties to then get resources that it _uses_ to then effectively
take control those resources.

I think we need way more detail on what's going on. Commit da114122b83
merely stated:

    For external phy, clk_phy should be optional, and some external phy
    need the clock input from clk_phy. This patch adds support for setting
    clk_phy for external phy.

If the external PHY requires a clock supplied to it, shouldn't the PHY
driver itself be getting that clock and setting it appropriately?

-- 
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTP is here! 80Mbps down 10Mbps up. Decent connectivity at last!

  parent reply	other threads:[~2025-09-04 10:58 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-09-04  3:12 [PATCH net] net: stmmac: dwmac-rk: Ensure clk_phy doesn't contain invalid address Yao Zi
2025-09-04  9:54 ` Simon Horman
2025-09-04  9:56   ` Simon Horman
2025-09-04 10:10     ` Yao Zi
2025-09-04 10:28       ` Simon Horman
2025-09-04 10:34 ` Simon Horman
2025-09-04 10:49   ` Russell King (Oracle)
2025-09-04 10:58     ` Chaoyi Chen
2025-09-04 11:20       ` Yao Zi
2025-09-04 11:13   ` Yao Zi
2025-09-04 10:58 ` Russell King (Oracle) [this message]
2025-09-04 11:03   ` Chaoyi Chen
2025-09-04 11:05     ` Russell King (Oracle)
2025-09-04 11:07       ` Russell King (Oracle)
2025-09-06  5:36         ` Yao Zi
2025-09-06  6:26           ` Chaoyi Chen
2025-09-06 20:25             ` Sebastian Reichel
2025-09-15  3:38               ` Chaoyi Chen

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