From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 56086291C19; Mon, 3 Nov 2025 13:57:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1762178270; cv=none; b=FvEXQg0ki8EUq9DJWtnJVnSYjURF9/B6k8Hp8q6nCKfjzKphrnj/INi6Fsh5K0xNWjPF4Rr+ioIEsLMJ2kZ+I1SuEvwGVjeu5Wao7Ok7kdSVmyPj9GyldWocj3HU+tUcpd4nt6NOC/lGvGAZ2cDmUupcjAs7nK8Wl9SmDLPZY5o= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1762178270; c=relaxed/simple; bh=z9++M6BLS3/GwKMvunjND69BcrrUGZt+U2207QrSN64=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=DGBMSZP+0UNCjG/phItEBSS4a+Sh4jfQfQZpfVdV2SS1u+YnS10v6VqTylUKkoYZ+8yVKeeCm77JxAA9SggSqVYITbqgO3vnl8q76Er8xtrLP61Fs+zycChJYYzDfHj2YoH5BF0NQDecALtg42XNeSfc+DoNoMgEiN7dE8n/9VY= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=bk2AUTtt; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="bk2AUTtt" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 376B2C4CEE7; Mon, 3 Nov 2025 13:57:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1762178269; bh=z9++M6BLS3/GwKMvunjND69BcrrUGZt+U2207QrSN64=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=bk2AUTttePeboe9F2ygXVNEAkhOOtMvH1UgTnCby0MW/wk6eMXlAw4T8xP2xG+z7k /FutuG/eQZqmFR1qzsYAKFZc0We44vwpCsl747hod0yKY19WwqlccHI2RFnvxgbcS2 +Ej2KfyVv495yvMEqS+oqDUZh5cr/pUUXe4biHvUeFiLHChG7N/NCdHWwHyi6lizXS I+awYKNhWudYOKYlOSr11g1qv9NOW7N2Yy61DGaRHrOfFnhg/bSdBP7Zsc0t12yJvN fCzRGb91RKWK6LIhaK6UI/Bgn89jjchkrXEamAvv+h6TangKx+a5/nONvasOkCnR6M X5ls7ERDvKo9g== Date: Mon, 3 Nov 2025 13:57:45 +0000 From: Simon Horman To: Tariq Toukan Cc: Eric Dumazet , Jakub Kicinski , Paolo Abeni , Andrew Lunn , "David S. Miller" , Saeed Mahameed , Leon Romanovsky , Mark Bloch , netdev@vger.kernel.org, linux-rdma@vger.kernel.org, linux-kernel@vger.kernel.org, Gal Pressman , Carolina Jubran Subject: Re: [PATCH net-next V2 3/7] net/mlx5e: Allow setting self loopback prevention bits on TIR init Message-ID: References: <1761831159-1013140-1-git-send-email-tariqt@nvidia.com> <1761831159-1013140-4-git-send-email-tariqt@nvidia.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1761831159-1013140-4-git-send-email-tariqt@nvidia.com> On Thu, Oct 30, 2025 at 03:32:35PM +0200, Tariq Toukan wrote: > Until now, IPoIB was creating TIRs without setting self loopback > prevention, then modifying them in activation stage. > > This is a preparation patch, that will be used by IPoIB to init TIRs > properly without the need for following calls of modify_tir. > > Signed-off-by: Tariq Toukan > Reviewed-by: Carolina Jubran Reviewed-by: Simon Horman