From: "Russell King (Oracle)" <linux@armlinux.org.uk>
To: Fabio Estevam <festevam@gmail.com>
Cc: Heiner Kallweit <hkallweit1@gmail.com>,
edumazet <edumazet@google.com>, netdev <netdev@vger.kernel.org>,
Andrew Lunn <andrew@lunn.ch>
Subject: Re: LAN8720: RX errors / packet loss when using smsc PHY driver on i.MX6Q
Date: Sat, 15 Nov 2025 22:01:19 +0000 [thread overview]
Message-ID: <aRj4L-BKoFeaJpWH@shell.armlinux.org.uk> (raw)
In-Reply-To: <CAOMZO5CLvDMgxi+VUVgiTy=TsK75QMYrTYZDEOzY4Y7eN=CRMw@mail.gmail.com>
On Sat, Nov 15, 2025 at 06:54:08PM -0300, Fabio Estevam wrote:
> On Sat, Nov 15, 2025 at 6:26 PM Heiner Kallweit <hkallweit1@gmail.com> wrote:
>
> > smsc_phy_reset() does two things:
> > 1. set PHY to "all capable" mode if in power-down
> > 2. genphy_soft_reset()
> >
> > Again, as the genphy driver works fine for you, both parts should be optional.
> > Check with part is causing the packet loss.
>
> It is the genphy_soft_reset() that causes the packet loss.
>
> If I comment it out like this, there is no packet loss:
>
> --- a/drivers/net/phy/smsc.c
> +++ b/drivers/net/phy/smsc.c
> @@ -149,8 +149,7 @@ static int smsc_phy_reset(struct phy_device *phydev)
> phy_write(phydev, MII_LAN83C185_SPECIAL_MODES, rc);
> }
>
> - /* reset the phy */
> - return genphy_soft_reset(phydev);
> + return 0
> }
>
This is no proof. The two are not independent. See 3.7.2 of the LAN8720
datasheet. A change to the MODE[2:0] field requires a soft reset to
take effect.
Avoiding the soft reset just means effectively you've disabled the
effect of the write to MII_LAN83C185_SPECIAL_MODES. I don't see
anywhere else that the driver would set the RESET bit in BMCR, so
this write will never take effect.
--
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
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next prev parent reply other threads:[~2025-11-15 22:01 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-13 22:25 LAN8720: RX errors / packet loss when using smsc PHY driver on i.MX6Q Fabio Estevam
2025-11-13 22:35 ` Andrew Lunn
2025-11-14 21:15 ` Fabio Estevam
2025-11-14 21:33 ` Heiner Kallweit
2025-11-14 21:48 ` Florian Fainelli
2025-11-14 22:48 ` Andrew Lunn
2025-11-15 21:01 ` Fabio Estevam
2025-11-15 21:26 ` Heiner Kallweit
2025-11-15 21:54 ` Fabio Estevam
2025-11-15 22:01 ` Russell King (Oracle) [this message]
2025-11-15 22:25 ` Fabio Estevam
2025-11-15 21:37 ` Russell King (Oracle)
2025-11-16 0:57 ` Fabio Estevam
2025-11-16 2:14 ` Fabio Estevam
2025-11-16 15:55 ` Andrew Lunn
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