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From: Simon Horman <horms@kernel.org>
To: Vimlesh Kumar <vimleshk@marvell.com>
Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org,
	sedara@marvell.com, srasheed@marvell.com, hgani@marvell.com,
	Veerasenareddy Burru <vburru@marvell.com>,
	Andrew Lunn <andrew+netdev@lunn.ch>,
	"David S. Miller" <davem@davemloft.net>,
	Eric Dumazet <edumazet@google.com>,
	Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
	Satananda Burla <sburla@marvell.com>,
	Abhijit Ayarekar <aayarekar@marvell.com>
Subject: Re: [PATCH net v1 1/3] octeon_ep: disable per ring interrupts
Date: Fri, 12 Dec 2025 16:13:12 +0000	[thread overview]
Message-ID: <aTw_GDbjNAB-AVKS@horms.kernel.org> (raw)
In-Reply-To: <20251212122304.2562229-2-vimleshk@marvell.com>

On Fri, Dec 12, 2025 at 12:23:00PM +0000, Vimlesh Kumar wrote:
> Disable the MSI-X per ring interrupt for every PF ring when PF
> netdev goes down.
> 
> Fixes: 1f2c2d0cee023 ("octeon_ep: add hardware configuration APIs")
> Signed-off-by: Sathesh Edara <sedara@marvell.com>
> Signed-off-by: Shinas Rasheed <srasheed@marvell.com>
> Signed-off-by: Vimlesh Kumar <vimleshk@marvell.com>
> ---
>  .../net/ethernet/marvell/octeon_ep/octep_cn9k_pf.c   | 12 ++++++++++--
>  .../net/ethernet/marvell/octeon_ep/octep_cnxk_pf.c   | 12 ++++++++++--
>  2 files changed, 20 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/net/ethernet/marvell/octeon_ep/octep_cn9k_pf.c b/drivers/net/ethernet/marvell/octeon_ep/octep_cn9k_pf.c
> index b5805969404f..db8ae1734e1b 100644
> --- a/drivers/net/ethernet/marvell/octeon_ep/octep_cn9k_pf.c
> +++ b/drivers/net/ethernet/marvell/octeon_ep/octep_cn9k_pf.c
> @@ -696,14 +696,22 @@ static void octep_enable_interrupts_cn93_pf(struct octep_device *oct)
>  /* Disable all interrupts */
>  static void octep_disable_interrupts_cn93_pf(struct octep_device *oct)
>  {
> -	u64 intr_mask = 0ULL;
> +	u64 reg_val, intr_mask = 0ULL;
>  	int srn, num_rings, i;
>  
>  	srn = CFG_GET_PORTS_PF_SRN(oct->conf);
>  	num_rings = CFG_GET_PORTS_ACTIVE_IO_RINGS(oct->conf);
>  
> -	for (i = 0; i < num_rings; i++)
> +	for (i = 0; i < num_rings; i++) {
>  		intr_mask |= (0x1ULL << (srn + i));
> +		reg_val = octep_read_csr64(oct, CN93_SDP_R_IN_INT_LEVELS(srn + i));
> +		reg_val &= ~(0x1ULL << 62);
> +		octep_write_csr64(oct, CN93_SDP_R_IN_INT_LEVELS(srn + i), reg_val);
> +
> +		reg_val = octep_read_csr64(oct, CN93_SDP_R_OUT_INT_LEVELS(srn + i));
> +		reg_val &= ~(0x1ULL << 62);
> +		octep_write_csr64(oct, CN93_SDP_R_OUT_INT_LEVELS(srn + i), reg_val);
> +	}
>  

I see that (0x1ULL << 62) is already used in this file.
So I think that as a fix what you have is fine.

But, as a follow-up, it may be nice to name this bit using a #define,
and to define it using BIT_ULL().

Likewise, it may be nice to use BIT_ULL() in place of (0x1Ull << ...) elsewhere.

...

  reply	other threads:[~2025-12-12 16:13 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-12-12 12:22 [PATCH net v1 0/3] disable interrupts and ensure dbell updation Vimlesh Kumar
2025-12-12 12:23 ` [PATCH net v1 1/3] octeon_ep: disable per ring interrupts Vimlesh Kumar
2025-12-12 16:13   ` Simon Horman [this message]
2025-12-12 12:23 ` [PATCH net v1 2/3] octeon_ep: ensure dbell BADDR updation Vimlesh Kumar
2025-12-12 16:07   ` Simon Horman
2025-12-12 12:23 ` [PATCH net v1 3/3] octeon_ep_vf: " Vimlesh Kumar

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