[PATCH net-next 0/4] net: phy: realtek: various improvements for 2.5GE PHYs

[PATCH net-next 0/4] net: phy: realtek: various improvements for 2.5GE PHYs

[Daniel Golle]

This series improves the RealTek PHY driver, mostly for 2.5GE PHYs.
It implements configuring SGMII and 2500Base-X in-band auto-negotiation
and improves using the PHYs in Clause-22 mode.

Note that the rtl822x_serdes_write() function introduced by this series
is going to be reused configure polarities of SerDes RX and TX lanes once
series "PHY polarity inversion via generic device tree properties" has
been applied.

Access to other registers on MDIO_MMD_VEND2 is important for more than
just configuring autonegotiation, it is also used to setup ALDPS or to
disable the PHY responding to the MDIO broadcast address 0. Both will
be implemented by follow-up patches.

The address translation function for registers on MDIO_MMD_VEND2 into
paged registers can potentially also be used to describe other paged access
in a more consistent way, but that mostly makes sense on PHYs which also
support Clause-45, so this series doesn't convert all the existing
paged access on RealTek's 1GE PHYs which do not support Clause-45.

Daniel Golle (4):
  net: phy: realtek: fix whitespace in struct phy_driver initializers
  net: phy: realtek: implement configuring in-band an
  net: phy: realtek: use paged access for MDIO_MMD_VEND2 in C22 mode
  net: phy: realtek: get rid of magic number in rtlgen_read_status()

 drivers/net/phy/realtek/realtek_main.c | 332 +++++++++++++++++++------
 1 file changed, 255 insertions(+), 77 deletions(-)

-- 
2.52.0

[PATCH net-next 1/4] net: phy: realtek: fix whitespace in struct phy_driver initializers

[Daniel Golle]

Consistently use tabs instead of spaces in struct phy_driver initializers.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
---
 drivers/net/phy/realtek/realtek_main.c | 146 ++++++++++++-------------
 1 file changed, 73 insertions(+), 73 deletions(-)

diff --git a/drivers/net/phy/realtek/realtek_main.c b/drivers/net/phy/realtek/realtek_main.c
index 6ff0385201a57..e42c5efbfa5ef 100644
--- a/drivers/net/phy/realtek/realtek_main.c
+++ b/drivers/net/phy/realtek/realtek_main.c
@@ -1976,7 +1976,7 @@ static irqreturn_t rtl8221b_handle_interrupt(struct phy_device *phydev)
 static struct phy_driver realtek_drvs[] = {
 	{
 		PHY_ID_MATCH_EXACT(0x00008201),
-		.name           = "RTL8201CP Ethernet",
+		.name		= "RTL8201CP Ethernet",
 		.read_page	= rtl821x_read_page,
 		.write_page	= rtl821x_write_page,
 	}, {
@@ -2102,7 +2102,7 @@ static struct phy_driver realtek_drvs[] = {
 		.name		= "RTL8226B_RTL8221B 2.5Gbps PHY",
 		.get_features	= rtl822x_get_features,
 		.config_aneg	= rtl822x_config_aneg,
-		.config_init    = rtl822xb_config_init,
+		.config_init	= rtl822xb_config_init,
 		.get_rate_matching = rtl822xb_get_rate_matching,
 		.read_status	= rtl822xb_read_status,
 		.suspend	= genphy_suspend,
@@ -2111,112 +2111,112 @@ static struct phy_driver realtek_drvs[] = {
 		.write_page	= rtl821x_write_page,
 	}, {
 		PHY_ID_MATCH_EXACT(0x001cc838),
-		.name           = "RTL8226-CG 2.5Gbps PHY",
-		.soft_reset     = rtl822x_c45_soft_reset,
-		.get_features   = rtl822x_c45_get_features,
-		.config_aneg    = rtl822x_c45_config_aneg,
-		.config_init    = rtl822x_config_init,
-		.read_status    = rtl822xb_c45_read_status,
-		.suspend        = genphy_c45_pma_suspend,
-		.resume         = rtlgen_c45_resume,
+		.name		= "RTL8226-CG 2.5Gbps PHY",
+		.soft_reset	= rtl822x_c45_soft_reset,
+		.get_features	= rtl822x_c45_get_features,
+		.config_aneg	= rtl822x_c45_config_aneg,
+		.config_init	= rtl822x_config_init,
+		.read_status	= rtl822xb_c45_read_status,
+		.suspend	= genphy_c45_pma_suspend,
+		.resume		= rtlgen_c45_resume,
 	}, {
 		PHY_ID_MATCH_EXACT(0x001cc848),
-		.name           = "RTL8226B-CG_RTL8221B-CG 2.5Gbps PHY",
-		.get_features   = rtl822x_get_features,
-		.config_aneg    = rtl822x_config_aneg,
-		.config_init    = rtl822xb_config_init,
+		.name		= "RTL8226B-CG_RTL8221B-CG 2.5Gbps PHY",
+		.get_features	= rtl822x_get_features,
+		.config_aneg	= rtl822x_config_aneg,
+		.config_init	= rtl822xb_config_init,
 		.get_rate_matching = rtl822xb_get_rate_matching,
-		.read_status    = rtl822xb_read_status,
-		.suspend        = genphy_suspend,
-		.resume         = rtlgen_resume,
-		.read_page      = rtl821x_read_page,
-		.write_page     = rtl821x_write_page,
+		.read_status	= rtl822xb_read_status,
+		.suspend	= genphy_suspend,
+		.resume		= rtlgen_resume,
+		.read_page	= rtl821x_read_page,
+		.write_page	= rtl821x_write_page,
 	}, {
 		.match_phy_device = rtl8221b_vb_cg_c22_match_phy_device,
-		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C22)",
+		.name		= "RTL8221B-VB-CG 2.5Gbps PHY (C22)",
 		.probe		= rtl822x_probe,
-		.get_features   = rtl822x_get_features,
-		.config_aneg    = rtl822x_config_aneg,
-		.config_init    = rtl822xb_config_init,
+		.get_features	= rtl822x_get_features,
+		.config_aneg	= rtl822x_config_aneg,
+		.config_init	= rtl822xb_config_init,
 		.get_rate_matching = rtl822xb_get_rate_matching,
-		.read_status    = rtl822xb_read_status,
-		.suspend        = genphy_suspend,
-		.resume         = rtlgen_resume,
-		.read_page      = rtl821x_read_page,
-		.write_page     = rtl821x_write_page,
+		.read_status	= rtl822xb_read_status,
+		.suspend	= genphy_suspend,
+		.resume		= rtlgen_resume,
+		.read_page	= rtl821x_read_page,
+		.write_page	= rtl821x_write_page,
 	}, {
 		.match_phy_device = rtl8221b_vb_cg_c45_match_phy_device,
-		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C45)",
+		.name		= "RTL8221B-VB-CG 2.5Gbps PHY (C45)",
 		.config_intr	= rtl8221b_config_intr,
 		.handle_interrupt = rtl8221b_handle_interrupt,
 		.probe		= rtl822x_probe,
-		.config_init    = rtl822xb_config_init,
+		.config_init	= rtl822xb_config_init,
 		.get_rate_matching = rtl822xb_get_rate_matching,
-		.get_features   = rtl822x_c45_get_features,
-		.config_aneg    = rtl822x_c45_config_aneg,
-		.read_status    = rtl822xb_c45_read_status,
-		.suspend        = genphy_c45_pma_suspend,
-		.resume         = rtlgen_c45_resume,
+		.get_features	= rtl822x_c45_get_features,
+		.config_aneg	= rtl822x_c45_config_aneg,
+		.read_status	= rtl822xb_c45_read_status,
+		.suspend	= genphy_c45_pma_suspend,
+		.resume		= rtlgen_c45_resume,
 	}, {
 		.match_phy_device = rtl8221b_vm_cg_c22_match_phy_device,
-		.name           = "RTL8221B-VM-CG 2.5Gbps PHY (C22)",
+		.name		= "RTL8221B-VM-CG 2.5Gbps PHY (C22)",
 		.probe		= rtl822x_probe,
-		.get_features   = rtl822x_get_features,
-		.config_aneg    = rtl822x_config_aneg,
-		.config_init    = rtl822xb_config_init,
+		.get_features	= rtl822x_get_features,
+		.config_aneg	= rtl822x_config_aneg,
+		.config_init	= rtl822xb_config_init,
 		.get_rate_matching = rtl822xb_get_rate_matching,
-		.read_status    = rtl822xb_read_status,
-		.suspend        = genphy_suspend,
-		.resume         = rtlgen_resume,
-		.read_page      = rtl821x_read_page,
-		.write_page     = rtl821x_write_page,
+		.read_status	= rtl822xb_read_status,
+		.suspend	= genphy_suspend,
+		.resume		= rtlgen_resume,
+		.read_page	= rtl821x_read_page,
+		.write_page	= rtl821x_write_page,
 	}, {
 		.match_phy_device = rtl8221b_vm_cg_c45_match_phy_device,
-		.name           = "RTL8221B-VM-CG 2.5Gbps PHY (C45)",
+		.name		= "RTL8221B-VM-CG 2.5Gbps PHY (C45)",
 		.config_intr	= rtl8221b_config_intr,
 		.handle_interrupt = rtl8221b_handle_interrupt,
 		.probe		= rtl822x_probe,
-		.config_init    = rtl822xb_config_init,
+		.config_init	= rtl822xb_config_init,
 		.get_rate_matching = rtl822xb_get_rate_matching,
-		.get_features   = rtl822x_c45_get_features,
-		.config_aneg    = rtl822x_c45_config_aneg,
-		.read_status    = rtl822xb_c45_read_status,
-		.suspend        = genphy_c45_pma_suspend,
-		.resume         = rtlgen_c45_resume,
+		.get_features	= rtl822x_c45_get_features,
+		.config_aneg	= rtl822x_c45_config_aneg,
+		.read_status	= rtl822xb_c45_read_status,
+		.suspend	= genphy_c45_pma_suspend,
+		.resume		= rtlgen_c45_resume,
 	}, {
 		.match_phy_device = rtl8251b_c45_match_phy_device,
-		.name           = "RTL8251B 5Gbps PHY",
+		.name		= "RTL8251B 5Gbps PHY",
 		.probe		= rtl822x_probe,
-		.get_features   = rtl822x_get_features,
-		.config_aneg    = rtl822x_config_aneg,
-		.read_status    = rtl822x_read_status,
-		.suspend        = genphy_suspend,
-		.resume         = rtlgen_resume,
-		.read_page      = rtl821x_read_page,
-		.write_page     = rtl821x_write_page,
+		.get_features	= rtl822x_get_features,
+		.config_aneg	= rtl822x_config_aneg,
+		.read_status	= rtl822x_read_status,
+		.suspend	= genphy_suspend,
+		.resume		= rtlgen_resume,
+		.read_page	= rtl821x_read_page,
+		.write_page	= rtl821x_write_page,
 	}, {
 		.match_phy_device = rtl_internal_nbaset_match_phy_device,
-		.name           = "Realtek Internal NBASE-T PHY",
+		.name		= "Realtek Internal NBASE-T PHY",
 		.flags		= PHY_IS_INTERNAL,
 		.probe		= rtl822x_probe,
-		.get_features   = rtl822x_get_features,
-		.config_aneg    = rtl822x_config_aneg,
-		.read_status    = rtl822x_read_status,
-		.suspend        = genphy_suspend,
-		.resume         = rtlgen_resume,
-		.read_page      = rtl821x_read_page,
-		.write_page     = rtl821x_write_page,
+		.get_features	= rtl822x_get_features,
+		.config_aneg	= rtl822x_config_aneg,
+		.read_status	= rtl822x_read_status,
+		.suspend	= genphy_suspend,
+		.resume		= rtlgen_resume,
+		.read_page	= rtl821x_read_page,
+		.write_page	= rtl821x_write_page,
 		.read_mmd	= rtl822x_read_mmd,
 		.write_mmd	= rtl822x_write_mmd,
 	}, {
 		PHY_ID_MATCH_EXACT(0x001ccad0),
 		.name		= "RTL8224 2.5Gbps PHY",
 		.flags		= PHY_POLL_CABLE_TEST,
-		.get_features   = rtl822x_c45_get_features,
-		.config_aneg    = rtl822x_c45_config_aneg,
-		.read_status    = rtl822x_c45_read_status,
-		.suspend        = genphy_c45_pma_suspend,
-		.resume         = rtlgen_c45_resume,
+		.get_features	= rtl822x_c45_get_features,
+		.config_aneg	= rtl822x_c45_config_aneg,
+		.read_status	= rtl822x_c45_read_status,
+		.suspend	= genphy_c45_pma_suspend,
+		.resume		= rtlgen_c45_resume,
 		.cable_test_start = rtl8224_cable_test_start,
 		.cable_test_get_status = rtl8224_cable_test_get_status,
 	}, {
@@ -2235,7 +2235,7 @@ static struct phy_driver realtek_drvs[] = {
 	}, {
 		PHY_ID_MATCH_EXACT(0x001ccb00),
 		.name		= "RTL9000AA_RTL9000AN Ethernet",
-		.features       = PHY_BASIC_T1_FEATURES,
+		.features	= PHY_BASIC_T1_FEATURES,
 		.config_init	= rtl9000a_config_init,
 		.config_aneg	= rtl9000a_config_aneg,
 		.read_status	= rtl9000a_read_status,
-- 
2.52.0

[PATCH net-next 2/4] net: phy: realtek: implement configuring in-band an

[Daniel Golle]

Implement the inband_caps() and config_inband() PHY driver methods to
allow configuring the use of in-band-status with SGMII and 2500Base-X on
RTL8226 and RTL8221B 2.5GE PHYs.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
---
 drivers/net/phy/realtek/realtek_main.c | 67 ++++++++++++++++++++++++++
 1 file changed, 67 insertions(+)

diff --git a/drivers/net/phy/realtek/realtek_main.c b/drivers/net/phy/realtek/realtek_main.c
index e42c5efbfa5ef..0653a9d8fcb6f 100644
--- a/drivers/net/phy/realtek/realtek_main.c
+++ b/drivers/net/phy/realtek/realtek_main.c
@@ -131,6 +131,15 @@
 #define RTL822X_VND1_SERDES_CTRL3_MODE_SGMII			0x02
 #define RTL822X_VND1_SERDES_CTRL3_MODE_2500BASEX		0x16
 
+#define RTL822X_VND1_SERDES_CMD			0x7587
+#define  RTL822X_VND1_SERDES_CMD_WRITE		BIT(1)
+#define  RTL822X_VND1_SERDES_CMD_BUSY		BIT(0)
+#define RTL822X_VND1_SERDES_ADDR		0x7588
+#define  RTL822X_VND1_SERDES_ADDR_AUTONEG	0x2
+#define   RTL822X_VND1_SERDES_INBAND_DISABLE	0x71d0
+#define   RTL822X_VND1_SERDES_INBAND_ENABLE	0x70d0
+#define RTL822X_VND1_SERDES_DATA		0x7589
+
 /* RTL822X_VND2_XXXXX registers are only accessible when phydev->is_c45
  * is set, they cannot be accessed by C45-over-C22.
  */
@@ -1308,6 +1317,50 @@ static int rtl822xb_config_init(struct phy_device *phydev)
 	return rtl822x_set_serdes_option_mode(phydev, false);
 }
 
+static int rtl822x_serdes_write(struct phy_device *phydev, u16 reg, u16 val)
+{
+	int ret, poll;
+
+	ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, RTL822X_VND1_SERDES_ADDR, reg);
+	if (ret < 0)
+		return ret;
+
+	ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, RTL822X_VND1_SERDES_DATA, val);
+	if (ret < 0)
+		return ret;
+
+	ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, RTL822X_VND1_SERDES_CMD,
+			    RTL822X_VND1_SERDES_CMD_WRITE |
+			    RTL822X_VND1_SERDES_CMD_BUSY);
+	if (ret < 0)
+		return ret;
+
+	return phy_read_mmd_poll_timeout(phydev, MDIO_MMD_VEND1,
+					 RTL822X_VND1_SERDES_CMD, poll,
+					 !(poll & RTL822X_VND1_SERDES_CMD_BUSY),
+					 500, 100000, false);
+}
+
+static int rtl822x_config_inband(struct phy_device *phydev, unsigned int modes)
+{
+	return rtl822x_serdes_write(phydev, RTL822X_VND1_SERDES_ADDR_AUTONEG,
+				    (modes != LINK_INBAND_DISABLE) ?
+				    RTL822X_VND1_SERDES_INBAND_ENABLE :
+				    RTL822X_VND1_SERDES_INBAND_DISABLE);
+}
+
+static unsigned int rtl822x_inband_caps(struct phy_device *phydev,
+					phy_interface_t interface)
+{
+	switch (interface) {
+	case PHY_INTERFACE_MODE_2500BASEX:
+	case PHY_INTERFACE_MODE_SGMII:
+		return LINK_INBAND_DISABLE | LINK_INBAND_ENABLE;
+	default:
+		return 0;
+	}
+}
+
 static int rtl822xb_get_rate_matching(struct phy_device *phydev,
 				      phy_interface_t iface)
 {
@@ -2103,6 +2156,8 @@ static struct phy_driver realtek_drvs[] = {
 		.get_features	= rtl822x_get_features,
 		.config_aneg	= rtl822x_config_aneg,
 		.config_init	= rtl822xb_config_init,
+		.inband_caps	= rtl822x_inband_caps,
+		.config_inband	= rtl822x_config_inband,
 		.get_rate_matching = rtl822xb_get_rate_matching,
 		.read_status	= rtl822xb_read_status,
 		.suspend	= genphy_suspend,
@@ -2116,6 +2171,8 @@ static struct phy_driver realtek_drvs[] = {
 		.get_features	= rtl822x_c45_get_features,
 		.config_aneg	= rtl822x_c45_config_aneg,
 		.config_init	= rtl822x_config_init,
+		.inband_caps	= rtl822x_inband_caps,
+		.config_inband	= rtl822x_config_inband,
 		.read_status	= rtl822xb_c45_read_status,
 		.suspend	= genphy_c45_pma_suspend,
 		.resume		= rtlgen_c45_resume,
@@ -2125,6 +2182,8 @@ static struct phy_driver realtek_drvs[] = {
 		.get_features	= rtl822x_get_features,
 		.config_aneg	= rtl822x_config_aneg,
 		.config_init	= rtl822xb_config_init,
+		.inband_caps	= rtl822x_inband_caps,
+		.config_inband	= rtl822x_config_inband,
 		.get_rate_matching = rtl822xb_get_rate_matching,
 		.read_status	= rtl822xb_read_status,
 		.suspend	= genphy_suspend,
@@ -2138,6 +2197,8 @@ static struct phy_driver realtek_drvs[] = {
 		.get_features	= rtl822x_get_features,
 		.config_aneg	= rtl822x_config_aneg,
 		.config_init	= rtl822xb_config_init,
+		.inband_caps	= rtl822x_inband_caps,
+		.config_inband	= rtl822x_config_inband,
 		.get_rate_matching = rtl822xb_get_rate_matching,
 		.read_status	= rtl822xb_read_status,
 		.suspend	= genphy_suspend,
@@ -2151,6 +2212,8 @@ static struct phy_driver realtek_drvs[] = {
 		.handle_interrupt = rtl8221b_handle_interrupt,
 		.probe		= rtl822x_probe,
 		.config_init	= rtl822xb_config_init,
+		.inband_caps	= rtl822x_inband_caps,
+		.config_inband	= rtl822x_config_inband,
 		.get_rate_matching = rtl822xb_get_rate_matching,
 		.get_features	= rtl822x_c45_get_features,
 		.config_aneg	= rtl822x_c45_config_aneg,
@@ -2164,6 +2227,8 @@ static struct phy_driver realtek_drvs[] = {
 		.get_features	= rtl822x_get_features,
 		.config_aneg	= rtl822x_config_aneg,
 		.config_init	= rtl822xb_config_init,
+		.inband_caps	= rtl822x_inband_caps,
+		.config_inband	= rtl822x_config_inband,
 		.get_rate_matching = rtl822xb_get_rate_matching,
 		.read_status	= rtl822xb_read_status,
 		.suspend	= genphy_suspend,
@@ -2177,6 +2242,8 @@ static struct phy_driver realtek_drvs[] = {
 		.handle_interrupt = rtl8221b_handle_interrupt,
 		.probe		= rtl822x_probe,
 		.config_init	= rtl822xb_config_init,
+		.inband_caps	= rtl822x_inband_caps,
+		.config_inband	= rtl822x_config_inband,
 		.get_rate_matching = rtl822xb_get_rate_matching,
 		.get_features	= rtl822x_c45_get_features,
 		.config_aneg	= rtl822x_c45_config_aneg,
-- 
2.52.0

[PATCH net-next 3/4] net: phy: realtek: use paged access for MDIO_MMD_VEND2 in C22 mode

[Daniel Golle]

RTL822x cannot access MDIO_MMD_VEND2 via MII_MMD_CTRL/MII_MMD_DATA.
A mapping to use paged access needs to be used instead.
All other MMD devices can be accessed as usual.
Implement phy_read_mmd and phy_write_mmd using paged access for
MDIO_MMD_VEND2 in Clause-22 mode instead of relying on
MII_MMD_CTRL/MII_MMD_DATA.
This allows eg. rtl822x_config_aneg to work as expected in case the
MDIO bus doesn't support Clause-45 access.

Suggested-by: Bevan Weiss <bevan.weiss@gmail.com>
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
---
 drivers/net/phy/realtek/realtek_main.c | 116 ++++++++++++++++++++++++-
 1 file changed, 113 insertions(+), 3 deletions(-)

diff --git a/drivers/net/phy/realtek/realtek_main.c b/drivers/net/phy/realtek/realtek_main.c
index 0653a9d8fcb6f..142a5421fe84c 100644
--- a/drivers/net/phy/realtek/realtek_main.c
+++ b/drivers/net/phy/realtek/realtek_main.c
@@ -140,9 +140,8 @@
 #define   RTL822X_VND1_SERDES_INBAND_ENABLE	0x70d0
 #define RTL822X_VND1_SERDES_DATA		0x7589
 
-/* RTL822X_VND2_XXXXX registers are only accessible when phydev->is_c45
- * is set, they cannot be accessed by C45-over-C22.
- */
+#define RTL822X_VND2_TO_PAGE(reg)		((reg) >> 4)
+#define RTL822X_VND2_TO_PAGE_REG(reg)		(16 + (((reg) & GENMASK(3, 0)) >> 1))
 #define RTL822X_VND2_C22_REG(reg)		(0xa400 + 2 * (reg))
 
 #define RTL8221B_VND2_INER			0xa4d2
@@ -1247,6 +1246,105 @@ static int rtl822x_probe(struct phy_device *phydev)
 	return 0;
 }
 
+/* RTL822x cannot access MDIO_MMD_VEND2 via MII_MMD_CTRL/MII_MMD_DATA.
+ * A mapping to use paged access needs to be used instead.
+ * All other MMD devices can be accessed as usual.
+ */
+static int rtl822xb_read_mmd(struct phy_device *phydev, int devnum, u16 reg)
+{
+	int oldpage, ret, read_ret;
+	u16 page;
+
+	/* Use Clause-45 bus access in case it is available */
+	if (phydev->is_c45)
+		return __mdiobus_c45_read(phydev->mdio.bus, phydev->mdio.addr,
+					  devnum, mmdreg);
+
+	/* Use indirect access via MII_MMD_CTRL and MII_MMD_DATA for all
+	 * MMDs except MDIO_MMD_VEND2
+	 */
+	if (devnum != MDIO_MMD_VEND2) {
+		__mdiobus_write(phydev->mdio.bus, phydev->mdio.addr,
+				MII_MMD_CTRL, devnum);
+		__mdiobus_write(phydev->mdio.bus, phydev->mdio.addr,
+				MII_MMD_DATA, mmdreg);
+		__mdiobus_write(phydev->mdio.bus, phydev->mdio.addr,
+				MII_MMD_CTRL, devnum | MII_MMD_CTRL_NOINCR);
+
+		return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr,
+				       MII_MMD_DATA);
+	}
+
+	/* Use paged access for MDIO_MMD_VEND2 over Clause-22 */
+	page = RTL822X_VND2_TO_PAGE(reg);
+	oldpage = __phy_read(phydev, RTL821x_PAGE_SELECT);
+	if (oldpage < 0)
+		return ret;
+
+	if (oldpage != page) {
+		ret = __phy_write(phydev, RTL821x_PAGE_SELECT, page);
+		if (ret < 0)
+			return ret;
+	}
+
+	read_ret = __phy_read(phydev, RTL822X_VND2_TO_PAGE_REG(reg));
+	if (oldpage != page) {
+		ret = __phy_write(phydev, RTL821x_PAGE_SELECT, oldpage);
+		if (ret < 0)
+			return ret;
+	}
+
+	return read_ret;
+}
+
+static int rtl822xb_write_mmd(struct phy_device *phydev, int devnum, u16 reg,
+			      u16 val)
+{
+	int oldpage, ret, write_ret;
+	u16 page;
+
+	/* Use Clause-45 bus access in case it is available */
+	if (phydev->is_c45)
+		return __mdiobus_c45_write(phydev->mdio.bus, phydev->mdio.addr,
+					   devnum, mmdreg, val);
+
+	/* Use indirect access via MII_MMD_CTRL and MII_MMD_DATA for all
+	 * MMDs except MDIO_MMD_VEND2
+	 */
+	if (devnum != MDIO_MMD_VEND2) {
+		__mdiobus_write(phydev->mdio.bus, phydev->mdio.addr,
+				MII_MMD_CTRL, devnum);
+		__mdiobus_write(phydev->mdio.bus, phydev->mdio.addr,
+				MII_MMD_DATA, mmdreg);
+		__mdiobus_write(phydev->mdio.bus, phydev->mdio.addr,
+				MII_MMD_CTRL, devnum | MII_MMD_CTRL_NOINCR);
+
+		return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr,
+				       MII_MMD_DATA, val);
+	}
+
+	/* Use paged access for MDIO_MMD_VEND2 over Clause-22 */
+	page = RTL822X_VND2_TO_PAGE(reg);
+	oldpage = __phy_read(phydev, RTL821x_PAGE_SELECT);
+	if (oldpage < 0)
+		return ret;
+
+	if (oldpage != page) {
+		ret = __phy_write(phydev, RTL821x_PAGE_SELECT, page);
+		if (ret < 0)
+			return ret;
+	}
+
+	write_ret = __phy_write(phydev,  RTL822X_VND2_TO_PAGE_REG(reg), val);
+	if (oldpage != page) {
+		ret = __phy_write(phydev, RTL821x_PAGE_SELECT, oldpage);
+		if (ret < 0)
+			return ret;
+	}
+
+	return write_ret;
+}
+
 static int rtl822x_set_serdes_option_mode(struct phy_device *phydev, bool gen1)
 {
 	bool has_2500, has_sgmii;
@@ -2150,6 +2248,8 @@ static struct phy_driver realtek_drvs[] = {
 		.resume		= rtlgen_resume,
 		.read_page	= rtl821x_read_page,
 		.write_page	= rtl821x_write_page,
+		.read_mmd	= rtl822xb_read_mmd,
+		.write_mmd	= rtl822xb_write_mmd,
 	}, {
 		.match_phy_device = rtl8221b_match_phy_device,
 		.name		= "RTL8226B_RTL8221B 2.5Gbps PHY",
@@ -2164,6 +2264,8 @@ static struct phy_driver realtek_drvs[] = {
 		.resume		= rtlgen_resume,
 		.read_page	= rtl821x_read_page,
 		.write_page	= rtl821x_write_page,
+		.read_mmd	= rtl822xb_read_mmd,
+		.write_mmd	= rtl822xb_write_mmd,
 	}, {
 		PHY_ID_MATCH_EXACT(0x001cc838),
 		.name		= "RTL8226-CG 2.5Gbps PHY",
@@ -2176,6 +2278,8 @@ static struct phy_driver realtek_drvs[] = {
 		.read_status	= rtl822xb_c45_read_status,
 		.suspend	= genphy_c45_pma_suspend,
 		.resume		= rtlgen_c45_resume,
+		.read_mmd	= rtl822xb_read_mmd,
+		.write_mmd	= rtl822xb_write_mmd,
 	}, {
 		PHY_ID_MATCH_EXACT(0x001cc848),
 		.name		= "RTL8226B-CG_RTL8221B-CG 2.5Gbps PHY",
@@ -2190,6 +2294,8 @@ static struct phy_driver realtek_drvs[] = {
 		.resume		= rtlgen_resume,
 		.read_page	= rtl821x_read_page,
 		.write_page	= rtl821x_write_page,
+		.read_mmd	= rtl822xb_read_mmd,
+		.write_mmd	= rtl822xb_write_mmd,
 	}, {
 		.match_phy_device = rtl8221b_vb_cg_c22_match_phy_device,
 		.name		= "RTL8221B-VB-CG 2.5Gbps PHY (C22)",
@@ -2205,6 +2311,8 @@ static struct phy_driver realtek_drvs[] = {
 		.resume		= rtlgen_resume,
 		.read_page	= rtl821x_read_page,
 		.write_page	= rtl821x_write_page,
+		.read_mmd	= rtl822xb_read_mmd,
+		.write_mmd	= rtl822xb_write_mmd,
 	}, {
 		.match_phy_device = rtl8221b_vb_cg_c45_match_phy_device,
 		.name		= "RTL8221B-VB-CG 2.5Gbps PHY (C45)",
@@ -2235,6 +2343,8 @@ static struct phy_driver realtek_drvs[] = {
 		.resume		= rtlgen_resume,
 		.read_page	= rtl821x_read_page,
 		.write_page	= rtl821x_write_page,
+		.read_mmd	= rtl822xb_read_mmd,
+		.write_mmd	= rtl822xb_write_mmd,
 	}, {
 		.match_phy_device = rtl8221b_vm_cg_c45_match_phy_device,
 		.name		= "RTL8221B-VM-CG 2.5Gbps PHY (C45)",
-- 
2.52.0

[PATCH net-next 4/4] net: phy: realtek: get rid of magic number in rtlgen_read_status()

[Daniel Golle]

Use newly introduced helper macros RTL822X_VND2_TO_PAGE and
RTL822X_VND2_TO_PAGE_REG to access RTL_VEND2_PHYSR register over Clause-22
paged access instead of using magic numbers.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
---
 drivers/net/phy/realtek/realtek_main.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/net/phy/realtek/realtek_main.c b/drivers/net/phy/realtek/realtek_main.c
index 142a5421fe84c..a61e9ed05cdd2 100644
--- a/drivers/net/phy/realtek/realtek_main.c
+++ b/drivers/net/phy/realtek/realtek_main.c
@@ -1153,7 +1153,8 @@ static int rtlgen_read_status(struct phy_device *phydev)
 	if (!phydev->link)
 		return 0;
 
-	val = phy_read_paged(phydev, 0xa43, 0x12);
+	val = phy_read_paged(phydev, RTL822X_VND2_TO_PAGE(RTL_VND2_PHYSR),
+			     RTL822X_VND2_TO_PAGE_REG(RTL_VND2_PHYSR));
 	if (val < 0)
 		return val;
 
-- 
2.52.0

Re: [PATCH net-next 3/4] net: phy: realtek: use paged access for MDIO_MMD_VEND2 in C22 mode

[ALOK TIWARI]

On 1/4/2026 6:42 PM, Daniel Golle wrote:
> +static int rtl822xb_read_mmd(struct phy_device *phydev, int devnum, u16 reg)
> +{
> +	int oldpage, ret, read_ret;
> +	u16 page;
> +
> +	/* Use Clause-45 bus access in case it is available */
> +	if (phydev->is_c45)
> +		return __mdiobus_c45_read(phydev->mdio.bus, phydev->mdio.addr,
> +					  devnum, mmdreg);
> +

mmdreg is not defined.

> +	/* Use indirect access via MII_MMD_CTRL and MII_MMD_DATA for all
> +	 * MMDs except MDIO_MMD_VEND2
> +	 */
> +	if (devnum != MDIO_MMD_VEND2) {
> +		__mdiobus_write(phydev->mdio.bus, phydev->mdio.addr,
> +				MII_MMD_CTRL, devnum);
> +		__mdiobus_write(phydev->mdio.bus, phydev->mdio.addr,
> +				MII_MMD_DATA, mmdreg);
> +		__mdiobus_write(phydev->mdio.bus, phydev->mdio.addr,
> +				MII_MMD_CTRL, devnum | MII_MMD_CTRL_NOINCR);
> +
> +		return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr,
> +				       MII_MMD_DATA);
> +	}
> +
> +	/* Use paged access for MDIO_MMD_VEND2 over Clause-22 */
> +	page = RTL822X_VND2_TO_PAGE(reg);
> +	oldpage = __phy_read(phydev, RTL821x_PAGE_SELECT);
> +	if (oldpage < 0)
> +		return ret;
> +
> +	if (oldpage != page) {
> +		ret = __phy_write(phydev, RTL821x_PAGE_SELECT, page);
> +		if (ret < 0)
> +			return ret;
> +	}
> +
> +	read_ret = __phy_read(phydev, RTL822X_VND2_TO_PAGE_REG(reg));
> +	if (oldpage != page) {
> +		ret = __phy_write(phydev, RTL821x_PAGE_SELECT, oldpage);
> +		if (ret < 0)
> +			return ret;
> +	}
> +
> +	return read_ret;
> +}

Thanks,
Alok

Re: [PATCH net-next 3/4] net: phy: realtek: use paged access for MDIO_MMD_VEND2 in C22 mode

[Russell King (Oracle)]

On Sun, Jan 04, 2026 at 01:12:13PM +0000, Daniel Golle wrote:
> +static int rtl822xb_read_mmd(struct phy_device *phydev, int devnum, u16 reg)
> +{
> +	int oldpage, ret, read_ret;
> +	u16 page;
> +
> +	/* Use Clause-45 bus access in case it is available */
> +	if (phydev->is_c45)
> +		return __mdiobus_c45_read(phydev->mdio.bus, phydev->mdio.addr,
> +					  devnum, mmdreg);
> +
> +	/* Use indirect access via MII_MMD_CTRL and MII_MMD_DATA for all
> +	 * MMDs except MDIO_MMD_VEND2
> +	 */
> +	if (devnum != MDIO_MMD_VEND2) {
> +		__mdiobus_write(phydev->mdio.bus, phydev->mdio.addr,
> +				MII_MMD_CTRL, devnum);
> +		__mdiobus_write(phydev->mdio.bus, phydev->mdio.addr,
> +				MII_MMD_DATA, mmdreg);
> +		__mdiobus_write(phydev->mdio.bus, phydev->mdio.addr,
> +				MII_MMD_CTRL, devnum | MII_MMD_CTRL_NOINCR);
> +
> +		return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr,
> +				       MII_MMD_DATA);
> +	}

I think I'd prefer this structure:

	if (devnum != MDIO_MMD_VEND2)
		return mmd_phy_read(phydev->mdio.bus, phydev->mdio.addr,
				    phydev->is_c45, devnum, regad);

	if (phydev->is_c45)
		return __mdiobus_c45_read(phydev->mdio.bus, phydev->mdio.addr,
					  devnum, mmdreg);

rather than open-coding the indirect access, or the reverse order with
mmd_phy_read() called with is_c45 set to false.

Same for the write function.

Thanks.

-- 
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTP is here! 80Mbps down 10Mbps up. Decent connectivity at last!

Re: [PATCH net-next 3/4] net: phy: realtek: use paged access for MDIO_MMD_VEND2 in C22 mode

[Daniel Golle]

On Sun, Jan 04, 2026 at 09:23:00PM +0000, Russell King (Oracle) wrote:
> On Sun, Jan 04, 2026 at 01:12:13PM +0000, Daniel Golle wrote:
> > +static int rtl822xb_read_mmd(struct phy_device *phydev, int devnum, u16 reg)
> > +{
> > +	int oldpage, ret, read_ret;
> > +	u16 page;
> > +
> > +	/* Use Clause-45 bus access in case it is available */
> > +	if (phydev->is_c45)
> > +		return __mdiobus_c45_read(phydev->mdio.bus, phydev->mdio.addr,
> > +					  devnum, mmdreg);
> > +
> > +	/* Use indirect access via MII_MMD_CTRL and MII_MMD_DATA for all
> > +	 * MMDs except MDIO_MMD_VEND2
> > +	 */
> > +	if (devnum != MDIO_MMD_VEND2) {
> > +		__mdiobus_write(phydev->mdio.bus, phydev->mdio.addr,
> > +				MII_MMD_CTRL, devnum);
> > +		__mdiobus_write(phydev->mdio.bus, phydev->mdio.addr,
> > +				MII_MMD_DATA, mmdreg);
> > +		__mdiobus_write(phydev->mdio.bus, phydev->mdio.addr,
> > +				MII_MMD_CTRL, devnum | MII_MMD_CTRL_NOINCR);
> > +
> > +		return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr,
> > +				       MII_MMD_DATA);
> > +	}
> 
> I think I'd prefer this structure:
> 
> 	if (devnum != MDIO_MMD_VEND2)
> 		return mmd_phy_read(phydev->mdio.bus, phydev->mdio.addr,
> 				    phydev->is_c45, devnum, regad);
> 
> 	if (phydev->is_c45)
> 		return __mdiobus_c45_read(phydev->mdio.bus, phydev->mdio.addr,
> 					  devnum, mmdreg);

Even this would be possible then:
	if (devnum != MDIO_MMD_VEND2 || phydev->is_c45)
		return mmd_phy_read(phydev->mdio.bus, phydev->mdio.addr,
				    phydev->is_c45, devnum, regad);

> 
> rather than open-coding the indirect access, or the reverse order with
> mmd_phy_read() called with is_c45 set to false.
> 
> Same for the write function.

I also thought it'd be good to do that, but that would require moving
the function prototypes from drivers/net/phy/phylib-internal.h to a
public header which the PHY driver may include, eg. phylib.h. (I suppose
that 'phylib-internal.h' should not be included in PHY drivers).

Needless to say that I also don't fancy open-coding unlocked variants
of phy_{read,write}_paged, but that's on a other story...

Re: [PATCH net-next 3/4] net: phy: realtek: use paged access for MDIO_MMD_VEND2 in C22 mode

[kernel test robot]

Hi Daniel,

kernel test robot noticed the following build errors:

[auto build test ERROR on net-next/main]

url:    https://github.com/intel-lab-lkp/linux/commits/Daniel-Golle/net-phy-realtek-fix-whitespace-in-struct-phy_driver-initializers/20260104-211500
base:   net-next/main
patch link:    https://lore.kernel.org/r/d7053fe51fb857b634880be5dcec253858f01aff.1767531485.git.daniel%40makrotopia.org
patch subject: [PATCH net-next 3/4] net: phy: realtek: use paged access for MDIO_MMD_VEND2 in C22 mode
config: x86_64-kexec (https://download.01.org/0day-ci/archive/20260104/202601042339.7aMa6atC-lkp@intel.com/config)
compiler: clang version 20.1.8 (https://github.com/llvm/llvm-project 87f0227cb60147a26a1eeb4fb06e3b505e9c7261)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20260104/202601042339.7aMa6atC-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202601042339.7aMa6atC-lkp@intel.com/

All errors (new ones prefixed by >>):

>> drivers/net/phy/realtek/realtek_main.c:1261:16: error: use of undeclared identifier 'mmdreg'; did you mean 'mmdrop'?
    1261 |                                           devnum, mmdreg);
         |                                                   ^~~~~~
         |                                                   mmdrop
   include/linux/sched/mm.h:47:20: note: 'mmdrop' declared here
      47 | static inline void mmdrop(struct mm_struct *mm)
         |                    ^
   drivers/net/phy/realtek/realtek_main.c:1270:19: error: use of undeclared identifier 'mmdreg'; did you mean 'mmdrop'?
    1270 |                                 MII_MMD_DATA, mmdreg);
         |                                               ^~~~~~
         |                                               mmdrop
   include/linux/sched/mm.h:47:20: note: 'mmdrop' declared here
      47 | static inline void mmdrop(struct mm_struct *mm)
         |                    ^
   drivers/net/phy/realtek/realtek_main.c:1309:17: error: use of undeclared identifier 'mmdreg'; did you mean 'mmdrop'?
    1309 |                                            devnum, mmdreg, val);
         |                                                    ^~~~~~
         |                                                    mmdrop
   include/linux/sched/mm.h:47:20: note: 'mmdrop' declared here
      47 | static inline void mmdrop(struct mm_struct *mm)
         |                    ^
   drivers/net/phy/realtek/realtek_main.c:1318:19: error: use of undeclared identifier 'mmdreg'; did you mean 'mmdrop'?
    1318 |                                 MII_MMD_DATA, mmdreg);
         |                                               ^~~~~~
         |                                               mmdrop
   include/linux/sched/mm.h:47:20: note: 'mmdrop' declared here
      47 | static inline void mmdrop(struct mm_struct *mm)
         |                    ^
   4 errors generated.


vim +1261 drivers/net/phy/realtek/realtek_main.c

  1248	
  1249	/* RTL822x cannot access MDIO_MMD_VEND2 via MII_MMD_CTRL/MII_MMD_DATA.
  1250	 * A mapping to use paged access needs to be used instead.
  1251	 * All other MMD devices can be accessed as usual.
  1252	 */
  1253	static int rtl822xb_read_mmd(struct phy_device *phydev, int devnum, u16 reg)
  1254	{
  1255		int oldpage, ret, read_ret;
  1256		u16 page;
  1257	
  1258		/* Use Clause-45 bus access in case it is available */
  1259		if (phydev->is_c45)
  1260			return __mdiobus_c45_read(phydev->mdio.bus, phydev->mdio.addr,
> 1261						  devnum, mmdreg);
  1262	
  1263		/* Use indirect access via MII_MMD_CTRL and MII_MMD_DATA for all
  1264		 * MMDs except MDIO_MMD_VEND2
  1265		 */
  1266		if (devnum != MDIO_MMD_VEND2) {
  1267			__mdiobus_write(phydev->mdio.bus, phydev->mdio.addr,
  1268					MII_MMD_CTRL, devnum);
  1269			__mdiobus_write(phydev->mdio.bus, phydev->mdio.addr,
  1270					MII_MMD_DATA, mmdreg);
  1271			__mdiobus_write(phydev->mdio.bus, phydev->mdio.addr,
  1272					MII_MMD_CTRL, devnum | MII_MMD_CTRL_NOINCR);
  1273	
  1274			return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr,
  1275					       MII_MMD_DATA);
  1276		}
  1277	
  1278		/* Use paged access for MDIO_MMD_VEND2 over Clause-22 */
  1279		page = RTL822X_VND2_TO_PAGE(reg);
  1280		oldpage = __phy_read(phydev, RTL821x_PAGE_SELECT);
  1281		if (oldpage < 0)
  1282			return ret;
  1283	
  1284		if (oldpage != page) {
  1285			ret = __phy_write(phydev, RTL821x_PAGE_SELECT, page);
  1286			if (ret < 0)
  1287				return ret;
  1288		}
  1289	
  1290		read_ret = __phy_read(phydev, RTL822X_VND2_TO_PAGE_REG(reg));
  1291		if (oldpage != page) {
  1292			ret = __phy_write(phydev, RTL821x_PAGE_SELECT, oldpage);
  1293			if (ret < 0)
  1294				return ret;
  1295		}
  1296	
  1297		return read_ret;
  1298	}
  1299	

-- 
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki

Re: [PATCH net-next 3/4] net: phy: realtek: use paged access for MDIO_MMD_VEND2 in C22 mode

[kernel test robot]

Hi Daniel,

kernel test robot noticed the following build errors:

[auto build test ERROR on net-next/main]

url:    https://github.com/intel-lab-lkp/linux/commits/Daniel-Golle/net-phy-realtek-fix-whitespace-in-struct-phy_driver-initializers/20260104-211500
base:   net-next/main
patch link:    https://lore.kernel.org/r/d7053fe51fb857b634880be5dcec253858f01aff.1767531485.git.daniel%40makrotopia.org
patch subject: [PATCH net-next 3/4] net: phy: realtek: use paged access for MDIO_MMD_VEND2 in C22 mode
config: x86_64-rhel-9.4-ltp (https://download.01.org/0day-ci/archive/20260105/202601050128.DGivvUie-lkp@intel.com/config)
compiler: gcc-14 (Debian 14.2.0-19) 14.2.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20260105/202601050128.DGivvUie-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202601050128.DGivvUie-lkp@intel.com/

All errors (new ones prefixed by >>):

   drivers/net/phy/realtek/realtek_main.c: In function 'rtl822xb_read_mmd':
>> drivers/net/phy/realtek/realtek_main.c:1261:51: error: 'mmdreg' undeclared (first use in this function); did you mean 'mmdrop'?
    1261 |                                           devnum, mmdreg);
         |                                                   ^~~~~~
         |                                                   mmdrop
   drivers/net/phy/realtek/realtek_main.c:1261:51: note: each undeclared identifier is reported only once for each function it appears in
   drivers/net/phy/realtek/realtek_main.c: In function 'rtl822xb_write_mmd':
   drivers/net/phy/realtek/realtek_main.c:1309:52: error: 'mmdreg' undeclared (first use in this function); did you mean 'mmdrop'?
    1309 |                                            devnum, mmdreg, val);
         |                                                    ^~~~~~
         |                                                    mmdrop


vim +1261 drivers/net/phy/realtek/realtek_main.c

  1248	
  1249	/* RTL822x cannot access MDIO_MMD_VEND2 via MII_MMD_CTRL/MII_MMD_DATA.
  1250	 * A mapping to use paged access needs to be used instead.
  1251	 * All other MMD devices can be accessed as usual.
  1252	 */
  1253	static int rtl822xb_read_mmd(struct phy_device *phydev, int devnum, u16 reg)
  1254	{
  1255		int oldpage, ret, read_ret;
  1256		u16 page;
  1257	
  1258		/* Use Clause-45 bus access in case it is available */
  1259		if (phydev->is_c45)
  1260			return __mdiobus_c45_read(phydev->mdio.bus, phydev->mdio.addr,
> 1261						  devnum, mmdreg);
  1262	
  1263		/* Use indirect access via MII_MMD_CTRL and MII_MMD_DATA for all
  1264		 * MMDs except MDIO_MMD_VEND2
  1265		 */
  1266		if (devnum != MDIO_MMD_VEND2) {
  1267			__mdiobus_write(phydev->mdio.bus, phydev->mdio.addr,
  1268					MII_MMD_CTRL, devnum);
  1269			__mdiobus_write(phydev->mdio.bus, phydev->mdio.addr,
  1270					MII_MMD_DATA, mmdreg);
  1271			__mdiobus_write(phydev->mdio.bus, phydev->mdio.addr,
  1272					MII_MMD_CTRL, devnum | MII_MMD_CTRL_NOINCR);
  1273	
  1274			return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr,
  1275					       MII_MMD_DATA);
  1276		}
  1277	
  1278		/* Use paged access for MDIO_MMD_VEND2 over Clause-22 */
  1279		page = RTL822X_VND2_TO_PAGE(reg);
  1280		oldpage = __phy_read(phydev, RTL821x_PAGE_SELECT);
  1281		if (oldpage < 0)
  1282			return ret;
  1283	
  1284		if (oldpage != page) {
  1285			ret = __phy_write(phydev, RTL821x_PAGE_SELECT, page);
  1286			if (ret < 0)
  1287				return ret;
  1288		}
  1289	
  1290		read_ret = __phy_read(phydev, RTL822X_VND2_TO_PAGE_REG(reg));
  1291		if (oldpage != page) {
  1292			ret = __phy_write(phydev, RTL821x_PAGE_SELECT, oldpage);
  1293			if (ret < 0)
  1294				return ret;
  1295		}
  1296	
  1297		return read_ret;
  1298	}
  1299	

-- 
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki