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* [PATCH v2] net: ethernet: mtk_eth_soc: avoid writing to ESW registers on MT7628
@ 2026-01-06  5:18 Joris Vaisvila
  2026-01-08 15:04 ` Simon Horman
  0 siblings, 1 reply; 4+ messages in thread
From: Joris Vaisvila @ 2026-01-06  5:18 UTC (permalink / raw)
  To: netdev
  Cc: nbd, sean.wang, lorenzo, andrew+netdev, davem, edumazet, kuba,
	pabeni, Joris Vaisvila

The MT7628 does not expose MAC control registers. Writes to these
registers corrupt the ESW VLAN configuration. Existing drivers
never use the affected features, so this went unnoticed.

This patch skips MCR register reads and writes on MT7628, preventing
invalid register access.

Fixes: 296c9120752b ("net: ethernet: mediatek: Add MT7628/88 SoC support")
Signed-off-by: Joris Vaisvila <joey@tinyisr.com>
---
v2:
- Add missing Fixes tag

 drivers/net/ethernet/mediatek/mtk_eth_soc.c | 17 ++++++++++++++---
 1 file changed, 14 insertions(+), 3 deletions(-)

diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
index e68997a29191..2fae6bd368a6 100644
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
@@ -699,6 +699,9 @@ static int mtk_mac_finish(struct phylink_config *config, unsigned int mode,
 	struct mtk_eth *eth = mac->hw;
 	u32 mcr_cur, mcr_new;
 
+	if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628))
+		return 0;
+
 	/* Enable SGMII */
 	if (interface == PHY_INTERFACE_MODE_SGMII ||
 	    phy_interface_mode_is_8023z(interface))
@@ -724,6 +727,9 @@ static void mtk_mac_link_down(struct phylink_config *config, unsigned int mode,
 	struct mtk_mac *mac = container_of(config, struct mtk_mac,
 					   phylink_config);
 
+	if (MTK_HAS_CAPS(mac->hw->soc->caps, MTK_SOC_MT7628))
+		return;
+
 	if (!mtk_interface_mode_is_xgmii(mac->hw, interface)) {
 		/* GMAC modes */
 		mtk_m32(mac->hw,
@@ -815,6 +821,9 @@ static void mtk_gdm_mac_link_up(struct mtk_mac *mac,
 {
 	u32 mcr;
 
+	if (MTK_HAS_CAPS(mac->hw->soc->caps, MTK_SOC_MT7628))
+		return;
+
 	mcr = mtk_r32(mac->hw, MTK_MAC_MCR(mac->id));
 	mcr &= ~(MAC_MCR_SPEED_100 | MAC_MCR_SPEED_1000 |
 		 MAC_MCR_FORCE_DPX | MAC_MCR_FORCE_TX_FC |
@@ -4357,9 +4366,11 @@ static void mtk_prepare_for_reset(struct mtk_eth *eth)
 	mtk_w32(eth, 0, MTK_FE_INT_ENABLE);
 
 	/* force link down GMAC */
-	for (i = 0; i < 2; i++) {
-		val = mtk_r32(eth, MTK_MAC_MCR(i)) & ~MAC_MCR_FORCE_LINK;
-		mtk_w32(eth, val, MTK_MAC_MCR(i));
+	if (!MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) {
+		for (i = 0; i < 2; i++) {
+			val = mtk_r32(eth, MTK_MAC_MCR(i)) & ~MAC_MCR_FORCE_LINK;
+			mtk_w32(eth, val, MTK_MAC_MCR(i));
+		}
 	}
 }
 
-- 
2.52.0


^ permalink raw reply related	[flat|nested] 4+ messages in thread

* Re: [PATCH v2] net: ethernet: mtk_eth_soc: avoid writing to ESW registers on MT7628
  2026-01-06  5:18 [PATCH v2] net: ethernet: mtk_eth_soc: avoid writing to ESW registers on MT7628 Joris Vaisvila
@ 2026-01-08 15:04 ` Simon Horman
  2026-01-08 16:35   ` Jakub Kicinski
  0 siblings, 1 reply; 4+ messages in thread
From: Simon Horman @ 2026-01-08 15:04 UTC (permalink / raw)
  To: Joris Vaisvila
  Cc: netdev, nbd, sean.wang, lorenzo, andrew+netdev, davem, edumazet,
	kuba, pabeni

On Tue, Jan 06, 2026 at 07:18:28AM +0200, Joris Vaisvila wrote:
> The MT7628 does not expose MAC control registers. Writes to these
> registers corrupt the ESW VLAN configuration. Existing drivers
> never use the affected features, so this went unnoticed.
> 
> This patch skips MCR register reads and writes on MT7628, preventing
> invalid register access.
> 
> Fixes: 296c9120752b ("net: ethernet: mediatek: Add MT7628/88 SoC support")
> Signed-off-by: Joris Vaisvila <joey@tinyisr.com>
> ---
> v2:
> - Add missing Fixes tag

Hi Joris,

While I think a minimal patch along these lines is appropriate as a bug
fix. I am wondering if, as a follow-up, consideration could be given to
registering alternate phy ops for MT7628. This would push the conditional
handling to probe rather than calback execution time. And I suspect it
would lead to a cleaner implementation.

^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: [PATCH v2] net: ethernet: mtk_eth_soc: avoid writing to ESW registers on MT7628
  2026-01-08 15:04 ` Simon Horman
@ 2026-01-08 16:35   ` Jakub Kicinski
  2026-01-09 20:09     ` Joris Vaišvila
  0 siblings, 1 reply; 4+ messages in thread
From: Jakub Kicinski @ 2026-01-08 16:35 UTC (permalink / raw)
  To: Simon Horman
  Cc: Joris Vaisvila, netdev, nbd, sean.wang, lorenzo, andrew+netdev,
	davem, edumazet, pabeni

On Thu, 8 Jan 2026 15:04:57 +0000 Simon Horman wrote:
> On Tue, Jan 06, 2026 at 07:18:28AM +0200, Joris Vaisvila wrote:
> > The MT7628 does not expose MAC control registers. Writes to these
> > registers corrupt the ESW VLAN configuration. Existing drivers
> > never use the affected features, so this went unnoticed.
> > 
> > This patch skips MCR register reads and writes on MT7628, preventing
> > invalid register access.
> > 
> > Fixes: 296c9120752b ("net: ethernet: mediatek: Add MT7628/88 SoC support")
> > Signed-off-by: Joris Vaisvila <joey@tinyisr.com>
> 
> While I think a minimal patch along these lines is appropriate as a bug
> fix. I am wondering if, as a follow-up, consideration could be given to
> registering alternate phy ops for MT7628. This would push the conditional
> handling to probe rather than calback execution time. And I suspect it
> would lead to a cleaner implementation.

Plus the commit message says: "Existing drivers never use the affected
features, so this went unnoticed." which makes it sound like user will
not notice the bad writes today?

So perhaps we can go for the cleaner approach and stick to net-next
(without fixing the older kernels?). Sorry for not reading the commit
message closely enough on v1.

^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: [PATCH v2] net: ethernet: mtk_eth_soc: avoid writing to ESW registers on MT7628
  2026-01-08 16:35   ` Jakub Kicinski
@ 2026-01-09 20:09     ` Joris Vaišvila
  0 siblings, 0 replies; 4+ messages in thread
From: Joris Vaišvila @ 2026-01-09 20:09 UTC (permalink / raw)
  To: Jakub Kicinski
  Cc: Simon Horman, netdev, nbd, sean.wang, lorenzo, andrew+netdev,
	davem, edumazet, pabeni

Hi Simon and Jakub, 
Thank you for the review.

> registering alternate phy ops for MT7628. This would push the conditional
> handling to probe rather than calback execution time. And I suspect it
> would lead to a cleaner implementation.

I wanted to keep the fix minimal and overlooked this as a potential
solution. This will make the next revision way easier to follow.

> Plus the commit message says: "Existing drivers never use the affected
> features, so this went unnoticed." which makes it sound like user will
> not notice the bad writes today?
> 
> So perhaps we can go for the cleaner approach and stick to net-next
> (without fixing the older kernels?). Sorry for not reading the commit
> message closely enough on v1.

Yes, current users should not be affected by the bug. I only ran into it
while kernel hacking. The fix is not necessary to add to older kernels.

Following your suggestions, v3 will target net-next and use separate phy
ops for clarity.

^ permalink raw reply	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2026-01-09 20:10 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-01-06  5:18 [PATCH v2] net: ethernet: mtk_eth_soc: avoid writing to ESW registers on MT7628 Joris Vaisvila
2026-01-08 15:04 ` Simon Horman
2026-01-08 16:35   ` Jakub Kicinski
2026-01-09 20:09     ` Joris Vaišvila

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