From: "Russell King (Oracle)" <linux@armlinux.org.uk>
To: Maxime Chevallier <maxime.chevallier@bootlin.com>
Cc: Andrew Lunn <andrew@lunn.ch>,
Heiner Kallweit <hkallweit1@gmail.com>,
Alexandre Torgue <alexandre.torgue@foss.st.com>,
Andrew Lunn <andrew+netdev@lunn.ch>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>,
linux-arm-kernel@lists.infradead.org,
linux-stm32@st-md-mailman.stormreply.com,
Maxime Coquelin <mcoquelin.stm32@gmail.com>,
netdev@vger.kernel.org, Paolo Abeni <pabeni@redhat.com>
Subject: Re: [PATCH net-next] net: stmmac: fix dwmac4 transmit performance regression
Date: Fri, 16 Jan 2026 23:21:28 +0000 [thread overview]
Message-ID: <aWrH-FAuWnqmbSaJ@shell.armlinux.org.uk> (raw)
In-Reply-To: <ab2d7cc9-e7d9-47fb-95ad-90ae4f5f1f67@bootlin.com>
On Fri, Jan 16, 2026 at 08:42:19AM +0100, Maxime Chevallier wrote:
> Hi Russell,
>
> On 16/01/2026 01:49, Russell King (Oracle) wrote:
> > dwmac4's transmit performance dropped by a factor of four due to an
> > incorrect assumption about which definitions are for what. This
> > highlights the need for sane register macros.
> >
> > Commit 8409495bf6c9 ("net: stmmac: cores: remove many xxx_SHIFT
> > definitions") changed the way the txpbl value is merged into the
> > register:
> >
> > value = readl(ioaddr + DMA_CHAN_TX_CONTROL(dwmac4_addrs, chan));
> > - value = value | (txpbl << DMA_BUS_MODE_PBL_SHIFT);
> > + value = value | FIELD_PREP(DMA_BUS_MODE_PBL, txpbl);
> >
> > With the following in the header file:
> >
> > #define DMA_BUS_MODE_PBL BIT(16)
> > -#define DMA_BUS_MODE_PBL_SHIFT 16
> >
> > The assumption here was that DMA_BUS_MODE_PBL was the mask for
> > DMA_BUS_MODE_PBL_SHIFT, but this turns out not to be the case.
> >
> > The field is actually six bits wide, buts 21:16, and is called
> > TXPBL.
> >
> > What's even more confusing is, there turns out to be a PBLX8
> > single bit in the DMA_CHAN_CONTROL register (0x1100 for channel 0),
> > and DMA_BUS_MODE_PBL seems to be used for that. However, this bit
> > et.al. was listed under a comment "/* DMA SYS Bus Mode bitmap */"
> > which is for register 0x1004.
> >
> > Fix this up by adding an appropriately named field definition under
> > the DMA_CHAN_TX_CONTROL() register address definition.
> >
> > Move the RPBL mask definition under DMA_CHAN_RX_CONTROL(), correctly
> > renaming it as well.
> >
> > Also move the PBL bit definition under DMA_CHAN_CONTROL(), correctly
> > renaming it.
> >
> > This removes confusion over the PBL fields.
> >
> > Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
>
> Good job finding the problem ! However you need a Fixes tag, even though
> ths is is for net-next.
I really give up with when fixes should be added or not, because it
seems quite random when it's needed and when it isn't.
And no, don't quote the stable-kernel-rules nonsense that is
meaningless ot stable kernel people, when they use AI to analyse
commits and pick stuff completely randomly.
> It would also have been nice to be in CC, I spent some time on the bisect...
I thought you were, but I see now it was a different Maxime!
> Besides that, problem solved on an imx8mp setup :)
>
> Tested-by: Maxime Chevallier <maxime.chevallier@bootlin.com>
> Reviewed-by: Maxime Chevallier <maxime.chevallier@bootlin.com>
Thanks.
--
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTP is here! 80Mbps down 10Mbps up. Decent connectivity at last!
next prev parent reply other threads:[~2026-01-16 23:21 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-16 0:49 [PATCH net-next] net: stmmac: fix dwmac4 transmit performance regression Russell King (Oracle)
2026-01-16 7:42 ` Maxime Chevallier
2026-01-16 23:21 ` Russell King (Oracle) [this message]
2026-01-17 9:26 ` Maxime Chevallier
2026-01-19 14:19 ` patchwork-bot+netdevbpf
2026-03-13 15:03 ` Georg Gottleuber
2026-03-13 16:35 ` Russell King (Oracle)
2026-03-13 18:39 ` Russell King (Oracle)
2026-03-16 10:51 ` Georg Gottleuber
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