From: Bo Gan <ganboing@gmail.com>
To: "Andrew Lunn" <andrew@lunn.ch>, 李志 <lizhi2@eswincomputing.com>
Cc: devicetree@vger.kernel.org, andrew+netdev@lunn.ch,
davem@davemloft.net, edumazet@google.com, kuba@kernel.org,
robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
netdev@vger.kernel.org, pabeni@redhat.com,
mcoquelin.stm32@gmail.com, alexandre.torgue@foss.st.com,
rmk+kernel@armlinux.org.uk,
linux-stm32@st-md-mailman.stormreply.com,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, ningyu@eswincomputing.com,
linmin@eswincomputing.com, pinkesh.vaghela@einfochips.com,
weishangjuan@eswincomputing.com
Subject: Re: [PATCH v1 1/2] dt-bindings: ethernet: eswin: add clock sampling control
Date: Thu, 22 Jan 2026 23:39:29 -0800 [thread overview]
Message-ID: <abf12a3f-9cdd-472d-a02e-af4da594b84f@gmail.com> (raw)
In-Reply-To: <c5c0bfdb-316d-4796-afa0-f6f018ceb414@lunn.ch>
Hi Andrew,
On 1/22/26 19:19, Andrew Lunn wrote:
>>> You say internal. So the skew is fixed, it is a property of the
>>> silicon? If so, why a DT property? Why not just hard code it in the
>>> driver? Since it is internal, different boards should not need it set
>>> differently?
>>>
>> Thanks for the question.
>>
>> EIC7700 has two Ethernet MACs. Only eth1 has this internal RXC/RXD skew,
>> eth0 does not.
>>
>> So this is not a chip-wide constant that can be hardcoded in the driver.
>> We need a way to distinguish the two MAC instances, which is why this is
>> described per-port in DTS.
>
> I assume the address of the interface is fixed. So you can just key
> off that to distinguish the two instances.
>
> Since this is an internal property, not a board property, it is not
> clear it actually belongs on DT.
>
> Andrew
IMO, they should be in DT to provide maximum flexibility. The SoC .dtsi
can provide some sane defaults, and the board vendor can later override
them if the mac/phy requires further tuning. Applying such tuning by
the address of MAC seems messy and it hides the parameters used behind
driver. Through DT, everything becomes really clear.
I assume this is not uncommon: E.g., starfive/jh7110:
https://lore.kernel.org/all/20230714104521.18751-3-samin.guo@starfivetech.com/
BTW, no need to worry about backward compat. ESWIN hasn't checked-in any
DT for eth yet. As you and Russell said, they need to do it, pronto.
Bo
next prev parent reply other threads:[~2026-01-23 7:41 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-09 8:06 [PATCH v1 0/2] net: stmmac: eic7700: fix EIC7700 eth1 RX sampling timing lizhi2
2026-01-09 8:08 ` [PATCH v1 1/2] dt-bindings: ethernet: eswin: add clock sampling control lizhi2
2026-01-09 18:27 ` Andrew Lunn
2026-01-10 18:26 ` Russell King (Oracle)
2026-01-11 4:05 ` Bo Gan
2026-01-12 7:05 ` 李志
2026-01-22 13:27 ` Andrew Lunn
2026-01-22 16:03 ` Russell King (Oracle)
2026-01-27 7:05 ` Min Lin
2026-01-27 13:40 ` Andrew Lunn
2026-01-12 6:00 ` 李志
2026-01-22 13:32 ` Andrew Lunn
2026-01-23 3:00 ` 李志
2026-01-23 3:19 ` Andrew Lunn
2026-01-23 7:39 ` Bo Gan [this message]
2026-01-23 9:52 ` 李志
2026-01-23 10:07 ` Krzysztof Kozlowski
2026-01-23 10:47 ` Bo Gan
2026-01-23 19:43 ` Andrew Lunn
2026-01-24 4:57 ` Bo Gan
2026-01-26 3:10 ` Min Lin
2026-01-26 18:29 ` Russell King (Oracle)
2026-01-27 6:14 ` Min Lin
2026-01-28 2:38 ` Bo Gan
2026-01-28 5:48 ` Min Lin
2026-02-03 6:06 ` Min Lin
2026-02-03 13:16 ` Andrew Lunn
2026-01-28 10:05 ` Krzysztof Kozlowski
2026-01-29 2:01 ` Bo Gan
2026-01-09 8:09 ` [PATCH v1 2/2] net: stmmac: eic7700: enable clocks before syscon access and correct RX sampling timing lizhi2
2026-01-09 18:31 ` Andrew Lunn
2026-01-12 6:55 ` 李志
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