From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1E814347506; Tue, 17 Mar 2026 08:06:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.19 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773734767; cv=none; b=S+5KVdnCAjJFLlghcHPFfLRK5vb4g9QHar9saXFVqRTRo+RlzZ4pFHsz4mLFncQvTjZ+IkEoRR82sfceRDry6zn0jW8AicRD1GA3Gfh1ZI/WQWRjQf5P3Qa08MgeXGE+Du9VRslBiolxxin4+Ylo4nJCEN5gzpcscLqyHU2itkc= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773734767; c=relaxed/simple; bh=iMURNNM9AIH1rsZHJq+NkuOt1cRxxMqU8WKIAQJWBhY=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=HU5u5OEPnl0hB2zO3f3fBM/GOtxZ2RAK+cnHETEO1kIfdiqKWx1YiSgex8LTqp8KnKHyXkyzRxKCOwij4XSgXBCdPaQhWL1bVCdf9SqES02SZKC8rJKdXyklJ9p62saPkj9+0JXBHIfLOAnV40q8px80mWZ8TbSyr0zS/2lgQP0= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=pass smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=eN/Vw3xF; arc=none smtp.client-ip=192.198.163.19 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="eN/Vw3xF" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1773734766; x=1805270766; h=date:from:to:cc:subject:message-id:references: mime-version:in-reply-to; bh=iMURNNM9AIH1rsZHJq+NkuOt1cRxxMqU8WKIAQJWBhY=; b=eN/Vw3xFo6L0Ez9LtUIqf1D5kZzucJMPpNuE9c49quSkRiwp3hvUMTkM OQ3Wd+uWy61SaY1m0Z/oHWqI9w2yHilgmMWtssQNnOIUDFq0hpdvmc4a1 U3uiI0wNM8hA2vvvyjaB4DPKHiM4c+ctbAhvax0uL4/0I1ioXL9q4i9Rg vqRz0tPoOKSGsaE8zcZmDt7eWJktHfC5sAHThlm0TQnpOh6ehZEDZQDcz LrGV2cFt495+Ryl4BF109D2BIIAyyzhHkztBK90b4xMBuGJ8dAY3SCuhE E2bbv/nJ3KpFDskz/KdRL/ImefS5EbusHDRdDZkwpAy6PGOT6THx5y2zY g==; X-CSE-ConnectionGUID: UdKncv1VTW+LFoCR9IAAxQ== X-CSE-MsgGUID: SD5/ARtQQ/6BfGcU64M6gw== X-IronPort-AV: E=McAfee;i="6800,10657,11731"; a="73777646" X-IronPort-AV: E=Sophos;i="6.23,124,1770624000"; d="scan'208";a="73777646" Received: from orviesa010.jf.intel.com ([10.64.159.150]) by fmvoesa113.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Mar 2026 01:06:05 -0700 X-CSE-ConnectionGUID: B6sce5gfS3eYat7KD1IA9A== X-CSE-MsgGUID: 7EgpgieoQr+l3rFUEy13xA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,124,1770624000"; d="scan'208";a="221425403" Received: from abityuts-desk.ger.corp.intel.com (HELO localhost) ([10.245.245.97]) by orviesa010-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Mar 2026 01:05:58 -0700 Date: Tue, 17 Mar 2026 10:05:55 +0200 From: Andy Shevchenko To: Wolfram Sang Cc: Douglas Anderson , Greg Kroah-Hartman , "Rafael J . Wysocki" , Danilo Krummrich , stable@vger.kernel.org, Andrew Lunn , Daniel Scally , "David S. Miller" , Eric Dumazet , Fabio Estevam , Frank Li , Heikki Krogerus , Heiner Kallweit , Jakub Kicinski , Len Brown , Mark Brown , Paolo Abeni , Pengutronix Kernel Team , Rob Herring , Russell King , Sakari Ailus , Saravana Kannan , Sascha Hauer , devicetree@vger.kernel.org, driver-core@lists.linux.dev, imx@lists.linux.dev, linux-acpi@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org, netdev@vger.kernel.org Subject: Re: [PATCH] device property: Make modifications of fwnode "flags" thread safe Message-ID: References: <20260316154159.1.I0a4d03104ecd5103df3d76f66c8d21b1d15a2e38@changeid> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Organization: Intel Finland Oy - BIC 0357606-4 - c/o Alberga Business Park, 6 krs, Bertel Jungin Aukio 5, 02600 Espoo On Tue, Mar 17, 2026 at 10:04:43AM +0200, Andy Shevchenko wrote: > On Tue, Mar 17, 2026 at 08:42:08AM +0100, Wolfram Sang wrote: > > > > > ... this change costs some memory on every system. Maybe it can be > > > > avoided? > > > > > > How much memory does it cost? On most 64-bit architectures is +4 bytes, > > > rarely +0 bytes, on m68k it might be +2bytes. On 32-bit it most likely > > > +0 bytes. I expect that 64-bit machines will cope with this bump. > > > > I am not opposing that the issue should be fixed. If it is not possible > > to take the lock everywhere, this is a proper solution. But if we don't > > have to use more memory, then we could save it. Our new SoC easily has > > 'struct device' in the hundreds. > > What's the alignment for the u8 member in your SoC? 4 bytes or 8 bytes? > (I assume it's 64-bit SoC.) FWIW, with the given change it will be still inside 64-byte data structure which most likely occupies a single cache line (before this patch and after as well). -- With Best Regards, Andy Shevchenko