Re: [PATCH net-next 1/4] dt-bindings: net: dsa: add MT7628 ESW

[Daniel Golle <daniel@makrotopia.org>]

On Fri, Mar 27, 2026 at 08:00:51AM +0200, Joris Vaisvila wrote:
> Hi Daniel, thanks for the feedback
> 
> On Thu, Mar 26, 2026 at 11:11:23PM +0000, Daniel Golle wrote:
> > > [...]
> > > +            port@6 {
> > > +                reg = <6>;
> > > +                ethernet = <&ethernet>;
> > > +                phy-mode = "rgmii";
> > 
> > Is this actually RGMII internally? Or some unknown internal way to
> > wire the switch CPU port to the CPU MAC? In this case, "internal"
> > should be used here as well.
> 
> I don't know how to find this out for sure.
> 
> In the MT7628 doc (https://vonger.cn/upload/MT7628_Full.pdf) port 6 is
> refered to as RGMII port 1 (RGMII port 0 being the non-existent port 5),
> but there are no clock registers to be seen.
> In RT3050 docs there are RGMII clock registers for port 5, but nothing
> for port 6, so maybe the CPU port is really using some mystery internal
> connection and only uses "RGMII" as a way to say it's a Gigabit port?
> 
> On the hardware I'm testing on, it works fine with the port set to
> "internal" or "rgmii". Would it make more sense to set "internal" then? 

"internal" then. It's a single-die SoC, the switch sharing the same
memory space, clocking domain, ... with all the rest of the SoC makes
it very unlikely that RGMII would be used as an on-die connection
type. (unlike eg. MT7621 or MT7623A which are using multiple dies in
the same package, and actually RGMII or TRGMII to connect the
MDIO-managed switch part to the main SoC, see "MCM" / "multi-chip
module" in the mt7530 driver...)