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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Subject: Re: [PATCH net-next v4 3/3] net: phy: add a PHY write barrier when disabling interrupts Message-ID: References: <20260402131229.319599-1-charles.perry@microchip.com> <20260402131229.319599-4-charles.perry@microchip.com> <6bb3aec4-1635-4287-b7ce-f15b693563ea@lunn.ch> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: On Thu, Apr 02, 2026 at 08:09:06PM +0200, Andrew Lunn wrote: > On Thu, Apr 02, 2026 at 07:03:42PM +0100, Russell King (Oracle) wrote: > > On Thu, Apr 02, 2026 at 03:31:52PM +0200, Andrew Lunn wrote: > > > > +static int phy_write_barrier(struct phy_device *phydev) > > > > +{ > > > > + int err; > > > > + > > > > + err = phy_read(phydev, MII_PHYSID1); > > > > + if (err < 0) > > > > + return err; > > > > > > There are a small number of MDIO busses which don't implement C22, > > > only C45. You are likely to get -EIO or maybe ENODEV, -EOPNOTSUPP, > > > -EINVAL for such a read. Returning the error than makes > > > phy_disable_interrupts() fail, etc. > > > > If it returns -EOPNOTSUPP (meaning, at least, that bus->read is not > > implemented), do we want to issue a C45 read instead? > > Maybe. > > get_phy_c45_ids() first reads MDIO_MMD_PMAPMD : MII_PHYSID1. That > seems like a safe option. Here's where I'm at with this: static void phy_write_barrier(struct phy_device *phydev) { int err; err = mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, MII_PHYSID1); if (err == -EOPNOTSUPP) mdiobus_c45_read(phydev->mdio.bus, phydev->mdio.addr, __ffs(phydev->c45_ids.mmds_present), MII_PHYSID1); } In part inspired by phylink_phy_read() in phylink.c Do you think there's any way I can test this on my VSC8574 or VSC8541? It supports some C45 registers for EEE but not the device discovery part. Thanks, Charles