Re: drivers/net/enic/vnic_cq.c

[Roland Dreier <rdreier@cisco.com>]

cc'ing Scott so we can make sure that this actually is atomic enough to
work with the enic hardware... (Scott, the context is that enic won't
build on any architecture that doesn't define writeq and readq, such as
32-bit x86; however the definitions below make it possible that multiple
32-bit writes will be interleaved, eg if an interrupt occurs between the
first writel and the second writel)

 > I just pushed the following into net-next-2.6:
 > 
 > enic: Attempt to fix build in 32-bit such as i386.
 > 
 > Such platforms lack readq/writeq but this driver want to call them.
 > 
 > Noticed by Andrew Morton.
 > 
 > Signed-off-by: David S. Miller <davem@davemloft.net>
 > ---
 >  drivers/net/enic/vnic_dev.h |   14 ++++++++++++++
 >  1 files changed, 14 insertions(+), 0 deletions(-)
 > 
 > diff --git a/drivers/net/enic/vnic_dev.h b/drivers/net/enic/vnic_dev.h
 > index 2dcffd3..b9dc182 100644
 > --- a/drivers/net/enic/vnic_dev.h
 > +++ b/drivers/net/enic/vnic_dev.h
 > @@ -27,6 +27,20 @@
 >  #define VNIC_PADDR_TARGET	0x0000000000000000ULL
 >  #endif
 >  
 > +#ifndef readq
 > +static inline u64 readq(void __iomem *reg)
 > +{
 > +	return (((u64)readl(reg + 0x4UL) << 32) |
 > +		(u64)readl(reg));
 > +}
 > +
 > +static inline void writeq(u64 val, void __iomem *reg)
 > +{
 > +	writel(val & 0xffffffff, reg);
 > +	writel(val >> 32, reg + 0x4UL);
 > +}
 > +#endif
 > +
 >  enum vnic_dev_intr_mode {
 >  	VNIC_DEV_INTR_MODE_UNKNOWN,
 >  	VNIC_DEV_INTR_MODE_INTX,
 > -- 
 > 1.5.6.5
 > 
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