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Mon, 20 Apr 2026 09:45:57 -0700 (PDT) Date: Mon, 20 Apr 2026 19:45:54 +0300 From: Dan Carpenter To: Jared Kangas Cc: Chester Lin , Matthias Brugger , Ghennadi Procopciuc , NXP S32 Linux Team , Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-arm-kernel@lists.infradead.org, imx@lists.linux.dev, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linaro-s32@linaro.org, netdev@vger.kernel.org Subject: Re: [PATCH v6 3/3] dts: s32g: Add GPR syscon region Message-ID: References: <0e922537c02d1c47734142090f98eb78e921ed34.1769764941.git.dan.carpenter@linaro.org> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: On Mon, Apr 20, 2026 at 09:04:00AM -0700, Jared Kangas wrote: > Fixing Dan's address based on mailmap update, sorry for the noise. > > On Fri, Apr 17, 2026 at 02:36:25PM -0700, Jared Kangas wrote: > > Hi Dan, > > > > On Fri, Jan 30, 2026 at 04:19:52PM +0300, Dan Carpenter wrote: > > > Add the GPR syscon region for the s32 chipset. > > > > > > Signed-off-by: Dan Carpenter > > > --- > > > > > > [snip] > > > > > > diff --git a/arch/arm64/boot/dts/freescale/s32g3.dtsi b/arch/arm64/boot/dts/freescale/s32g3.dtsi > > > index e314f3c7d61d..be03db737384 100644 > > > --- a/arch/arm64/boot/dts/freescale/s32g3.dtsi > > > +++ b/arch/arm64/boot/dts/freescale/s32g3.dtsi > > > @@ -383,6 +383,11 @@ usdhc0-200mhz-grp4 { > > > }; > > > }; > > > > > > + gpr: syscon@4007c000 { > > > + compatible = "nxp,s32g3-gpr", "syscon"; > > > + reg = <0x4007c000 0x3000>; > > > + }; > > > + > > > ocotp: nvmem@400a4000 { > > > compatible = "nxp,s32g3-ocotp", "nxp,s32g2-ocotp"; > > > reg = <0x400a4000 0x400>; > > > @@ -808,6 +813,7 @@ gmac0: ethernet@4033c000 { > > > compatible = "nxp,s32g2-dwmac"; > > > reg = <0x4033c000 0x2000>, /* gmac IP */ > > > <0x4007c004 0x4>; /* GMAC_0_CTRL_STS */ > > > + nxp,phy-sel = <&gpr 0x4>; > > > interrupt-parent = <&gic>; > > > interrupts = ; > > > interrupt-names = "macirq"; > > > > I gave this a test on an S32G-VNP-RDB3 and didn't see any issues on the > > dwmac-s32 side, but this appears to trigger a panic when reading the new > > debugfs regmap/*/registers file for the syscon node: > > > > # grep 4007c000 /proc/vmallocinfo > > 0xffff800083da8000-0xffff800083dac000 16384 ioremap_prot+0x74/0xe0 phys=0x000000004007c000 ioremap > > # cat /sys/kernel/debug/regmap/dummy-syscon@0x000000004007c000/registers > > Internal error: synchronous external abort: 0000000096000210 [#1] SMP > > [...] > > CPU: 0 UID: 0 PID: 4344 Comm: cat Tainted: G M E X ------ --- 6.12.0+ #226 PREEMPT_RT > > Tainted: [M]=MACHINE_CHECK, [E]=UNSIGNED_MODULE, [X]=AUX > > [...] > > pc : regmap_mmio_read32le+0x44/0xa0 > > lr : regmap_mmio_read32le+0x44/0xa0 > > [...] > > x23: ffff00080c080000 x22: ffff000802ac4c00 x21: ffff800087b13c9c > > x20: ffff800080a46494 x19: ffff800083da810c x18: 0000000000000004 > > [...] > > x5 : ffff800080a46448 x4 : ffff800083da8000 x3 : ffff800080a46494 > > x2 : ffff800080a47230 x1 : ffff800083da810c x0 : 0000000000000020 > > Call trace: > > regmap_mmio_read32le+0x44/0xa0 (P) > > regmap_mmio_read+0x4c/0x80 > > [...] > > Code: 52800400 8b214093 aa1303e1 97f4caf0 (b9400275) > > ---[ end trace 0000000000000000 ]--- > > Kernel panic - not syncing: synchronous external abort: Fatal exception > > > > Running this through decodecode gives: > > > > All code > > ======== > > 0: 52800400 mov w0, #0x20 // #32 > > 4: 8b214093 add x19, x4, w1, uxtw > > 8: aa1303e1 mov x1, x19 > > c: 97f4caf0 bl 0xffffffffffd32bcc > > 10:* b9400275 ldr w21, [x19] <-- trapping instruction > > > > Code starting with the faulting instruction > > =========================================== > > 0: b9400275 ldr w21, [x19] > > > > x19's offset from the base address in /proc/vmallocinfo is 0x10c, which > > points to a bad read at physical address 0x4007c10c; I also confirmed > > that the preceding memory reads back without issues: Oh, ugh... I didn't realize that this wasn't merged. I don't have a way to test this any more. The simplest fix would be to do change the 0x3000 to 0x100. The GPR63 register is at 0xFC. reg = <0x4007c000 0x100>; That's probably the best fix as well. The later register areas would be their own syscons. regards, dan carpenter