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[34.127.9.76]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2b9f0b21c4bsm88242915ad.29.2026.05.04.15.54.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 04 May 2026 15:54:12 -0700 (PDT) Date: Mon, 4 May 2026 22:54:08 +0000 From: David Matlack To: Jason Gunthorpe Cc: Alex Williamson , kvm@vger.kernel.org, Leon Romanovsky , linux-kselftest@vger.kernel.org, linux-rdma@vger.kernel.org, Mark Bloch , netdev@vger.kernel.org, Saeed Mahameed , Shuah Khan , Tariq Toukan , patches@lists.linux.dev, Josh Hilke Subject: Re: [PATCH 00/11] mlx5 support for VFIO self test Message-ID: References: <0-v1-dc5fa250ca1d+3213-mlx5st_jgg@nvidia.com> <20260501164314.GA1381708@nvidia.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20260501164314.GA1381708@nvidia.com> On 2026-05-01 01:43 PM, Jason Gunthorpe wrote: > On Fri, May 01, 2026 at 09:11:11AM -0700, David Matlack wrote: > > On Thu, Apr 30, 2026 at 5:08 PM Jason Gunthorpe wrote: > > > > > > Add an mlx5 driver to VFIO self test. This is largely a remix of the > > > existing VFIO mlx5 driver in rdma-core. It uses an RDMA loopback QP > > > to issue RDMA WRITE operations which effectively perform memory > > > copies using DMA. Since mlx5 has a stable programming ABI this > > > should work on devices from CX5 to current HW. The device FW must > > > support the QP loopback configuration. > > > > > This entire series was coded by Claude Code in about 4 days. > > > > Very exciting. Josh Hilke from Google is also working on using AI to > > create a selftest driver for Intel IGB NICs so VFIO selftests can run > > in QEMU [1]. So it's encouraging to see you were able to do it with > > mlx5. > > > > [1] https://www.qemu.org/docs/master/system/devices/igb.html > > Yes! I would feed DPDK in as well in this case? Combined with the > kernel driver it should be doable. It is much easier if you understand > how the NIC works, of course. This worked out significantly because I > guided it through sufficiently small steps and knew where to find all > the quality reference material.. > > > > - Make it work on a PF too (this is surprisingly hard!). > > > > Can it work on CX VFs? We're interested in continuously performing > > memory copies across a Live Update using a VF via selftests to > > demonstrate SR-IOV preservation (when we eventually get there). > > Yes, I started with VF because it is simpler. Makes sense. I tested it out and was able to get vfio_pci_driver_test passing with a CX7 VF. > The PF support flow requires a bunch more complicated stuff. Do you think it's worth supporting PFs? If anyone with a CX NIC can enable SR-IOV and run selftests on a VF then we can keep the driver somewhat simpler.