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Mon, 01 Jun 2026 19:54:09 -0700 (PDT) Received: from DC6WP-EXCH02.marvell.com (10.76.176.209) by DC6WP-EXCH02.marvell.com (10.76.176.209) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.25; Mon, 1 Jun 2026 19:54:07 -0700 Received: from maili.marvell.com (10.69.176.80) by DC6WP-EXCH02.marvell.com (10.76.176.209) with Microsoft SMTP Server id 15.2.1544.25 via Frontend Transport; Mon, 1 Jun 2026 19:54:07 -0700 Received: from rkannoth-OptiPlex-7090 (unknown [10.28.36.165]) by maili.marvell.com (Postfix) with SMTP id AEBB23F7081; Mon, 1 Jun 2026 19:54:04 -0700 (PDT) Date: Tue, 2 Jun 2026 08:24:03 +0530 From: Ratheesh Kannoth To: , , , CC: , , , , , Nithin Dabilpuram Subject: Re: [PATCH net] octeontx2-af: npc: Fix CPT channel mask in npc_install_flow Message-ID: References: <20260601023221.858168-1-rkannoth@marvell.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <20260601023221.858168-1-rkannoth@marvell.com> X-Proofpoint-GUID: cobwClBDzRyDMsN6X_WqJ1DABhSz9AkG X-Proofpoint-ORIG-GUID: cobwClBDzRyDMsN6X_WqJ1DABhSz9AkG X-Authority-Analysis: v=2.4 cv=ZeYt8MVA c=1 sm=1 tr=0 ts=6a1e45d1 cx=c_pps a=gIfcoYsirJbf48DBMSPrZA==:117 a=gIfcoYsirJbf48DBMSPrZA==:17 a=kj9zAlcOel0A:10 a=FelO9ux0wxsA:10 a=VkNPw1HP01LnGYTKEx00:22 a=l0iWHRpgs5sLHlkKQ1IR:22 a=TtqV-g6YmW1Jfm2GSLaY:22 a=M5GUcnROAAAA:8 a=L-Tot5tVp8rV6VoGPfcA:9 a=CjuIK1q_8ugA:10 a=OBjm3rFKGHvpk9ecZwUJ:22 a=Oh551-UHZqmTy8JkqTUo:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNjAyMDAyNSBTYWx0ZWRfX7TaN4l+i1hwz wRYqlG2h2Kg8mR0gDh+ki41BDY7/vq9tEvwUkgT5yW6E3KG5asqhRVth4/fLbnkPhqxEGNgjRbp g69qQJrIthM5d8chFqtK/NX6i01oel4A95Nqo2rH7jPXsbCUslWGnPI/pVeAMov3kWVPoElKYwT P7BW7CMG+oQu6TIUUUVVTFgSukIRINlEbU1uyGLgnRkbFLfA9bTAtqg77Zhjf2FlZ61H8KgrDX6 DyWmXzMQkj48DpAYQTMLw8u6sjiuOXLG5zvci1UALE4LljVTTeoAl8RwQ1XH6wj1ISvE1wRoxB6 o05Gvbx7fsVrlvGLkpD0LYWpdoaO3vBC98WoBd3pY+0RmtDpldgKKuuz+VkMvY/RY+jOskcZOil w3/9C2ldfPlDrYdCFX3rSFL2DP/uUnD29Sb1Ntz9YKkyWBIqjYqMcAyS0sbZ8X7RoM8kcgjb8xC BO9ICK5xhtX/9sfeNPw== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.125,FMLib:17.12.100.49 definitions=2026-06-01_07,2026-05-28_03,2025-10-01_01 On 2026-06-01 at 08:02:21, Ratheesh Kannoth (rkannoth@marvell.com) wrote: > From: Nithin Dabilpuram >> - /* For cn10k the upper two bits of the channel number are >> - * cpt channel number. with masking out these bits in the >> - * mcam entry, same entry used for NIX will allow packets >> - * received from cpt for parsing. >> - */ >> - if (!is_rvu_otx2(rvu)) >> - req.chan_mask = NIX_CHAN_CPT_X2P_MASK; >> - else >> - req.chan_mask = 0xFFFU; >> - >> + req.chan_mask = rvu_get_cpt_chan_mask(rvu); >This is a pre-existing issue, but while this update correctly applies the >CPT-aware NIX channel mask here, is it possible that other default NIX RX >MCAM steering rules were missed? >For example, in drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c, >rvu_npc_install_ucast_entry() still hardcodes the channel mask to 0xFFFU: >rvu_npc_install_ucast_entry() { > ... > req.channel = chan; > req.chan_mask = 0xFFFU; > req.intf = pfvf->nix_rx_intf; > ... >} >Since these are internal requests (req.hdr.pcifunc = 0), they bypass the >override in rvu_mbox_handler_npc_install_flow(). Does this mean inline >IPsec packets returning from CPT could fail to match these default L2 >steering rules and get dropped? >Similar hardcoded 0xFFF(U) values appear to still exist in >rvu_npc_install_bcast_match_entry() and rvu_switch_disable() in >drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c. >> req.channel = chan; >> req.intf = pfvf->nix_rx_intf; >> req.entry = index; > ACK. pw-bot: changes-requested