From: Richard Cheng <icheng@nvidia.com>
To: alejandro.lucero-palau@amd.com
Cc: linux-cxl@vger.kernel.org, netdev@vger.kernel.org,
dan.j.williams@kernel.org, edward.cree@amd.com,
davem@davemloft.net, kuba@kernel.org, pabeni@redhat.com,
edumazet@google.com, dave.jiang@intel.com,
Alejandro Lucero <alucerop@amd.com>
Subject: Re: [PATCH v29 0/5] Type2 device basic support
Date: Fri, 26 Jun 2026 11:56:21 +0800 [thread overview]
Message-ID: <aj33zZ_19GzRcRTn@MWDK4CY14F> (raw)
In-Reply-To: <20260622124010.2192888-1-alejandro.lucero-palau@amd.com>
On Mon, Jun 22, 2026 at 01:40:05PM +0800, alejandro.lucero-palau@amd.com wrote:
> From: Alejandro Lucero <alucerop@amd.com>
>
> This series adds the last bits for allowing a CXL Type2 driver to obtain
> a CXL region linked to the device HDM decoders committed by the BIOS,
> with the driver being the sfc network driver.
>
> Changes from v28:
>
> - patch 1:
> fix doc (Ed Cree)
> fix error path (Sashiko)
>
> - patch 3:
> removing extra + char (sashiko)
>
> - path5:
> remove stray change (Ed Cree)
>
> Changes from v27:
>
> - patch 1: make driver probe failing if error in efx_cxl_init (Dan)
> - patch 4: add unmapping if error after efx_cxl_init (Dave)
> - patch 4/5: move cxl_pio_initialised from patch 4 to patch 5 (Dave)
>
> Tested in the cxl_for_7.3 branch.
>
Hi Alejandro,
The series looks fine to me with one small question in patch 4.
I don't have the required NIC to test it, and not enough knowledge to
give a deep enough review, I can just say it LGTM at this point.
I'll leave for other guru to give tags.
Thanks for this.
Best regards,
Richard Cheng.
> Alejandro Lucero (5):
> sfc: add cxl support
> cxl/sfc: Map cxl regs
> cxl/sfc: Initialize dpa without a mailbox
> sfc: obtain and map cxl range using devm_cxl_probe_mem
> sfc: support pio mapping based on cxl
>
> drivers/cxl/core/core.h | 2 +
> drivers/cxl/core/mbox.c | 51 +------------
> drivers/cxl/core/memdev.c | 67 ++++++++++++++++
> drivers/cxl/core/pci.c | 1 +
> drivers/cxl/core/port.c | 1 +
> drivers/cxl/core/regs.c | 1 +
> drivers/cxl/cxlpci.h | 12 ---
> drivers/cxl/pci.c | 1 +
> drivers/net/ethernet/sfc/Kconfig | 9 +++
> drivers/net/ethernet/sfc/Makefile | 1 +
> drivers/net/ethernet/sfc/ef10.c | 41 ++++++++--
> drivers/net/ethernet/sfc/efx.c | 18 ++++-
> drivers/net/ethernet/sfc/efx_cxl.c | 105 ++++++++++++++++++++++++++
> drivers/net/ethernet/sfc/efx_cxl.h | 32 ++++++++
> drivers/net/ethernet/sfc/net_driver.h | 10 +++
> drivers/net/ethernet/sfc/nic.h | 3 +
> include/cxl/cxl.h | 2 +
> include/cxl/pci.h | 22 ++++++
> 18 files changed, 309 insertions(+), 70 deletions(-)
> create mode 100644 drivers/net/ethernet/sfc/efx_cxl.c
> create mode 100644 drivers/net/ethernet/sfc/efx_cxl.h
> create mode 100644 include/cxl/pci.h
>
>
> base-commit: 9b1e70e8f9ec4b5c6ce7fa774a0023bb6894c686
> --
> 2.34.1
>
>
prev parent reply other threads:[~2026-06-26 3:57 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-22 12:40 [PATCH v29 0/5] Type2 device basic support alejandro.lucero-palau
2026-06-22 12:40 ` [PATCH v29 1/5] sfc: add cxl support alejandro.lucero-palau
2026-06-22 12:40 ` [PATCH v29 2/5] cxl/sfc: Map cxl regs alejandro.lucero-palau
2026-06-22 12:40 ` [PATCH v29 3/5] cxl/sfc: Initialize dpa without a mailbox alejandro.lucero-palau
2026-06-22 12:40 ` [PATCH v29 4/5] sfc: obtain and map cxl range using devm_cxl_probe_mem alejandro.lucero-palau
2026-06-24 22:10 ` Dan Williams (nvidia)
2026-06-25 9:31 ` Alejandro Lucero Palau
2026-06-25 20:34 ` Dan Williams (nvidia)
2026-06-26 3:52 ` Richard Cheng
2026-06-22 12:40 ` [PATCH v29 5/5] sfc: support pio mapping based on cxl alejandro.lucero-palau
2026-06-26 3:56 ` Richard Cheng [this message]
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