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X-CSE-ConnectionGUID: a+iC/NXVRFGrPd6XwKpQ1w== X-CSE-MsgGUID: XWUO+aQkRXKrx6nR2LyW0w== X-IronPort-AV: E=McAfee;i="6800,10657,11832"; a="94883790" X-IronPort-AV: E=Sophos;i="6.24,233,1774335600"; d="scan'208";a="94883790" Received: from orviesa007.jf.intel.com ([10.64.159.147]) by fmvoesa104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Jun 2026 22:20:20 -0700 X-CSE-ConnectionGUID: t9Hv/DrSRa6tVdNCttLtrQ== X-CSE-MsgGUID: UHByy7OvTc6B1DVHvZlakg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.24,233,1774335600"; d="scan'208";a="252305245" Received: from black.igk.intel.com ([10.91.253.5]) by orviesa007.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Jun 2026 22:20:16 -0700 Date: Tue, 30 Jun 2026 07:20:13 +0200 From: Raag Jadav To: Riana Tauro Cc: intel-xe@lists.freedesktop.org, dri-devel@lists.freedesktop.org, netdev@vger.kernel.org, aravind.iddamsetty@linux.intel.com, anshuman.gupta@intel.com, rodrigo.vivi@intel.com, joonas.lahtinen@linux.intel.com, kuba@kernel.org, simona.vetter@ffwll.ch, airlied@gmail.com, pratik.bari@intel.com, joshua.santosh.ranjan@intel.com, ashwin.kumar.kulkarni@intel.com, shubham.kumar@intel.com, ravi.kishore.koppuravuri@intel.com, maarten.lankhorst@linux.intel.com, mallesh.koujalagi@intel.com, soham.purkait@intel.com Subject: Re: [PATCH v3 3/3] drm/xe/xe_ras: Add error-event support for CRI Message-ID: References: <20260622101716.3313496-5-riana.tauro@intel.com> <20260622101716.3313496-8-riana.tauro@intel.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260622101716.3313496-8-riana.tauro@intel.com> On Mon, Jun 22, 2026 at 03:47:20PM +0530, Riana Tauro wrote: > Add error-event support for Correctable errors in CRI. > error-event is reported to userspace for all errors that crossed > threshold on receiving an interrupt for correctable errors. ... > +static void ras_send_error_event(struct xe_device *xe, u8 severity, u8 component) > +{ > + u8 drm_severity, drm_component; > + u32 value; > + int ret; > + > + drm_severity = xe_to_drm_ras_severity(severity); > + if (drm_severity == DRM_XE_RAS_ERR_SEV_MAX) > + return; > + > + drm_component = xe_to_drm_ras_component(component); > + if (drm_component == DRM_XE_RAS_ERR_COMP_MAX) > + return; > + > + ret = xe_ras_get_counter(xe, severity, component, &value); > + if (ret) > + return; > + > + xe_drm_ras_event(xe, drm_component, drm_severity, value, GFP_KERNEL); > +} > + > void xe_ras_counter_threshold_crossed(struct xe_device *xe, > struct xe_sysctrl_event_response *response) > { > @@ -152,6 +203,8 @@ void xe_ras_counter_threshold_crossed(struct xe_device *xe, > severity = errors[id].common.severity; > component = errors[id].common.component; > > + ras_send_error_event(xe, severity, component); We already have error-value as part of the event, so this looks like a lot of redundant duplicate events if threshold is set high enough. I'm wondering if we use a local variable as a bitmap for components (which we set here) and only send event for_each_set_bit() after the loop? Raag > xe_warn(xe, "[RAS]: %s %s detected\n", > comp_to_str(component), sev_to_str(severity)); > } > -- > 2.47.1 >