From: Breno Leitao <leitao@debian.org>
To: Pu Lehui <pulehui@huaweicloud.com>
Cc: Tony Nguyen <anthony.l.nguyen@intel.com>,
Przemek Kitszel <przemyslaw.kitszel@intel.com>,
Andrew Lunn <andrew+netdev@lunn.ch>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>,
Paolo Abeni <pabeni@redhat.com>,
netdev@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH net] e1000e: Fix out-of-bounds MMIO access by validating BAR0 size
Date: Mon, 20 Jul 2026 05:53:37 -0700 [thread overview]
Message-ID: <al4Z4_tFbyQM-ogu@gmail.com> (raw)
In-Reply-To: <ffc0a0d8-6560-4589-9570-04f40d817009@huaweicloud.com>
On Mon, Jul 20, 2026 at 07:56:20PM +0800, Pu Lehui wrote:
>
> On 2026/7/20 17:47, Breno Leitao wrote:
> > On Wed, Jul 15, 2026 at 03:58:50AM +0000, Pu Lehui wrote:
> > > +/* Minimum MMIO (BAR0) len, the largest offset is lower than 64K */
> >
> > Why "the largest" in this case?
>
> Hi Breno,
>
> Thanks for pointing that out. I meant the maximum register offset accessed
> by the driver.
>
> IIUC, common e1000e NIC usually have a 128K BAR0. But since I'm not 100%
> sure if older NIC might be smaller, I picked 64K as a safe lower limit
> because it covers the largest register offset used in the driver's codebase.
> If my assumption here is off, I'd really appreciate any corrections!
>
> And for this comment, how about the follow?
> /* Minimum MMIO (BAR0) length to safely cover the maximum register offset
> accessed by the driver */
Thanks, Would something like this be a bit better?
/*
* Smallest BAR0 that covers every register the driver accesses
*/
next prev parent reply other threads:[~2026-07-20 12:54 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-15 3:58 [PATCH net] e1000e: Fix out-of-bounds MMIO access by validating BAR0 size Pu Lehui
2026-07-20 1:25 ` Pu Lehui
2026-07-20 9:47 ` Breno Leitao
2026-07-20 11:56 ` Pu Lehui
2026-07-20 12:53 ` Breno Leitao [this message]
2026-07-20 13:16 ` Pu Lehui
2026-07-20 14:46 ` Andrew Lunn
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