Re: [PATCH v4 net] octeontx2-af: Block VFs from clobbering special CGX PKIND state

[Ratheesh Kannoth <rkannoth@marvell.com>]

On 2026-07-21 at 11:59:06, Ratheesh Kannoth (rkannoth@marvell.com) wrote:
> From: Hariprasad Kelam <hkelam@marvell.com>
>
> PF and VF NIX LFs that share a CGX LMAC reuse the same hardware PKIND
> programming. When HiGig2 or EDSA parsing is enabled, a VF NIX LF alloc must
> not reset the LMAC RX PKIND or default TX parse config over the PF setup.
>
> Add cgx_get_pkind() and rvu_cgx_is_pkind_config_permitted() so VFs skip
> cgx_set_pkind(), rvu_npc_set_pkind(), and NIX_AF_LFX_TX_PARSE_CFG updates
> when the LMAC is using NPC_RX_HIGIG_PKIND or NPC_RX_EDSA_PKIND.
>
> Fixes: 94d942c5fb97 ("octeontx2-af: Config pkind for CGX mapped PFs")
> Cc: Geetha sowjanya <gakula@marvell.com>
> Signed-off-by: Hariprasad Kelam <hkelam@marvell.com>
> Signed-off-by: Ratheesh Kannoth <rkannoth@marvell.com>

https://sashiko.dev/#/patchset/20260721062907.784484-1-rkannoth%40marvell.com wrote

>> diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
>> index 6a0ce2665031d..d1de9c9894bdc 100644
>> --- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
>> +++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
>[ ... ]
>> @@ -1685,8 +1687,19 @@ int rvu_mbox_handler_nix_lf_alloc(struct rvu *rvu,
>>  	rvu_write64(rvu, blkaddr, NIX_AF_LFX_RX_CFG(nixlf), req->rx_cfg);
>>
>>  	/* Configure pkind for TX parse config */
>> -	cfg = NPC_TX_DEF_PKIND;
>> -	rvu_write64(rvu, blkaddr, NIX_AF_LFX_TX_PARSE_CFG(nixlf), cfg);
>> +
>> +	pf = rvu_get_pf(rvu->pdev, pcifunc);
>> +
>> +	if (is_pf_cgxmapped(rvu, pf)) {
>> +		rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);
>> +		cgxd = rvu_cgx_pdata(cgx_id, rvu);
>> +		mutex_lock(&cgxd->lock);
>> +		if (rvu_cgx_is_pkind_config_permitted(rvu, pcifunc)) {
>> +			cfg = NPC_TX_DEF_PKIND;
>> +			rvu_write64(rvu, blkaddr, NIX_AF_LFX_TX_PARSE_CFG(nixlf), cfg);
>> +		}
>> +		mutex_unlock(&cgxd->lock);
>> +	}
>
>Does this code leave the TX parse configuration uninitialized for non-CGX
>mapped interfaces?
>
>Because rvu_lf_reset() zeroes all LF hardware registers earlier in
>rvu_mbox_handler_nix_lf_alloc(), it appears that if is_pf_cgxmapped()
>evaluates to false, NIX_AF_LFX_TX_PARSE_CFG will remain 0.
>
>Will non-CGX interfaces like SDP, loopback, or representor interfaces need
>an else branch to ensure they are programmed with NPC_TX_DEF_PKIND?
>
>>
>>  	if (is_rep_dev(rvu, pcifunc)) {
>>  		pfvf->tx_chan_base = RVU_SWITCH_LBK_CHAN;

ACK.

pw-bot: changes-requested