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Mon, 31 Aug 2026 01:33:47 -0700 (PDT) Date: Mon, 31 Aug 2026 14:03:39 +0530 From: Mohd Ayaan Anwar To: Andrew Lunn Cc: Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Richard Cochran , Bjorn Andersson , Konrad Dybcio , Maxime Coquelin , Alexandre Torgue , Russell King , linux-arm-msm@vger.kernel.org, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH RFC 3/9] net: stmmac: qcom-ethqos: fix RGMII_ID mode to use DLL bypass Message-ID: References: <20260612-shikra_ethernet-v1-0-f0f4a1d19929@oss.qualcomm.com> <20260612-shikra_ethernet-v1-3-f0f4a1d19929@oss.qualcomm.com> <42355330-c22a-4fce-98ab-dc22b321ff16@lunn.ch> <82705420-771d-41bf-a4d9-ed94dff86ff0@lunn.ch> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-Proofpoint-ORIG-GUID: g3_cawcp6c7wD2gZ1itKiYYLjTettxdW X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwODMxMDA3MiBTYWx0ZWRfX0hGvNDY8ghCR Kl4CloqblcH+j9pEXKYA5/0oBaUFfgPHYDeQ/Cstt4+V1g6u9BFEOwrfvyYsqlnY/3RgFzXyVjm yqpxYnVLwBlOMRvtxPe3APTtNWPSf2oGVkrQM9m7+hgOk8l9CmMwD4nSgqFwaZ2581mHnzMPsn3 fDqThYGzGkhAnGhxDJQHusFqOEd9IDKhQm6VhDMSDxbvH4mcVW58CZb/1zbpj6agHb7TgOCIbWL kQLRLoFaRJ87uUaVeLzts9sblOkXBVw34rSGueDLenmQFVOR5HpxdDK6f2uAcFJoa1C1Lk0lnxE eu3Yrnq3v394SnX+PmBlT9PU73em2wN+oIIzYBiFrT1cY6Mnpa/c/iqyhzn1/x0EZRxwTInQZs4 rwzspgtV6FyO0JSiQ/teXMRNx30g9d+n2/73BKllEVhsQZ33wRlwCI3/bkb4lbp3vCapfv6rqHJ EcfB8dAgNFlonFi3IAA== X-Proofpoint-GUID: g3_cawcp6c7wD2gZ1itKiYYLjTettxdW X-Proofpoint-Spam-Info: AW1haW4tMjYwODMxMDA3MiBTYWx0ZWRfX1YeANjqxOBb8 oQBL6CjonDyUbRY28jgw7fL+Slp9m8SJ4J21qhdOD6cJj+HCsOJaWIQBLNaIUQUNuN8zBOWZms/ qvCtIFjLtng3sx2sGLa23ux24t9rnIE= X-Authority-Analysis: v=2.4 cv=GbQnWwXL c=1 sm=1 tr=0 ts=6a953c6d cx=c_pps a=IZJwPbhc+fLeJZngyXXI0A==:117 a=ZePRamnt/+rB5gQjfz0u9A==:17 a=kj9zAlcOel0A:10 a=Sv0fKeRqtYgA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=3WHJM1ZQz_JShphwDgj5:22 a=VwQbUJbxAAAA:8 a=ee_2aqc6AAAA:8 a=4fMhwKYZf46Hqd9eeeQA:9 a=CjuIK1q_8ugA:10 a=uG9DUKGECoFWVXl0Dc02:22 a=VOpmJXOdbJOWo2YY3GeN:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-08-31_03,2026-08-27_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 phishscore=0 suspectscore=0 lowpriorityscore=0 clxscore=1015 bulkscore=0 priorityscore=1501 adultscore=0 malwarescore=0 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2608310072 Hi Andrew, On Tue, Jun 16, 2026 at 10:02:51PM +0530, Mohd Ayaan Anwar wrote: > On Mon, Jun 15, 2026 at 06:48:55PM +0200, Andrew Lunn wrote: > > > > I'm curious how this works at the moment? Do no boards make use of > > > > RGMII ID? Are all current boards broken? > > > > > > Searching through the DTS, I found that we have two boards using "rgmii" > > > (qcs404-evb-4000.dts and sa8155-adp.dts) and another board using > > > "rgmii-txid" (sa8540p-ride.dts). No board which uses RGMII ID. > > > > So this causes problems. We cannot break existing boards, yet it would > > be good to fix the current broken behaviour. > > I am trying to track down the sa8155-adp and sa8540p-ride boards. The > EMAC on QCS404 is extremely similar to QCS615 Ride [0], and I got that > board to work with this series (with RGMII ID mode). So I am fairly > confident that QCS404 would not break (if its even booting up with the > upstream kernel currently). Also, I think we could change the phy-mode > for QCS404 to "rgmii-id" from "rgmii" if these fixes go in. > > > It could be the best way forward is that you issue a warning when > > "rgmii" is found and pass rgmii-id to the PHY. And you also change the > > two boards to use rgmii-id. Lets think about the rgmii-txid case once > > we better understand it. > > > > As Konrad mentioned, it would be great to know if we can test out these > boards. Looking at the different versions of the ETHQOS programming > guide, stopping MAC side delay should be as simple as what we are doing > in this commit. But whether the two boards work directly with the > default PHY delays is unknown. > So I did find the sa8540p-ride board but have so far been unsuccessful in getting it to boot. While that goes on, I would like to proceed with a series to fix RGMII on qcom-ethqos due to the following reasons: 1. All versions of programming guides give a programming sequence for MAC-side delay or PHY-side delay. There is no concept of "rgmii-txid". 2. I also found some downstream code that was using "rgmii" phy-mode to program MAC-side delays on the sa8540p-ride board. So it looks like "rgmii-txid" was a workaround to enable ethernet while support for this board was being upstreamed. 3. I have been able to test this patch on a variety of boards now, including: - Shikra CQ/IQ variants (with the TI DP83867 PHY) - QCS615 Ride (with the Micrel KSZ9031 PHY) - Talos EVK (again with the Micrel KSZ9031 PHY) - Talos Lyra (with the TI DP83867 PHY) These platforms cover the two RGMII configurations that Qualcomm has typically deployed. With this in mind, I was thinking of breaking up this patch series into separate ones to solve one problem at a time: 1. Introduce support for "rgmii-id" using PHY-side delays rather than MAC-provided delays. Also, issue a warning if any other phy-mode is being used. 2. Fix the DTS of the existing boards to use "rgmii-id". 3. Once the DTS is fixed, remove the now-unused code handling non RGMII-ID cases. This should also allow us to remove the whole ethqos_emac_por code since it wouldn't be needed for RGMII-ID. 4. Add support for regulator voting in the DP83867 driver, mirroring what Daniel Thompson/ Alex Elder did for QCA8081 [1]. This will help in adding support for the Shikra/Talos Lyra boards which need the supply for the PHY to be explicitly enabled. 5. Support for Shikra can be added once these changes are in. Does this plan sound reasonable? Thanks. Ayaan --- [1] https://lore.kernel.org/netdev/20260605010022.968612-3-elder@riscstar.com/