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Date: Tue, 8 Sep 2026 11:56:30 +0100
From: Daniel Golle <daniel@makrotopia.org>
To: "A. Sverdlin" <alexander.sverdlin@siemens.com>
Cc: netdev@vger.kernel.org, Hauke Mehrtens <hauke@hauke-m.de>,
	Andrew Lunn <andrew@lunn.ch>, Vladimir Oltean <olteanv@gmail.com>,
	"David S. Miller" <davem@davemloft.net>,
	Eric Dumazet <edumazet@google.com>,
	Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
	Russell King <linux@armlinux.org.uk>, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2] net: dsa: mxl-gsw1xx: deassert internal PHY resets
 before MDIO registration
Message-ID: <ap_p3hpoa1MII9pz@makrotopia.org>
References: <20260908103030.4032992-1-alexander.sverdlin@siemens.com>
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In-Reply-To: <20260908103030.4032992-1-alexander.sverdlin@siemens.com>

On Tue, Sep 08, 2026 at 12:30:28PM +0200, A. Sverdlin wrote:
> From: Alexander Sverdlin <alexander.sverdlin@siemens.com>
> 
> When the switch is bootstrapped with PS_NOWAIT = 0, the internal PHYs
> default to a held-in-reset state. The driver previously only worked with
> PS_NOWAIT = 1 where PHYs are released from reset automatically.
> 
> Deassert the PHY reset lines via the RST_REQ register before the MDIO bus
> is registered, so that PHY IDs can be read during bus scan. Only release
> PHYs for ports that have a phy-handle in the device tree, so unused ports
> do not consume power. A single 300ms delay after deasserting all needed
> resets ensures the PHYs are ready for MDIO communication (refer to Intel
> XWAY, Maxlinear GPY111 datasheets or the Lantiq counterpart of the driver).
> 
> Signed-off-by: Alexander Sverdlin <alexander.sverdlin@siemens.com>
> 
> [...]
> +static int gsw1xx_setup(struct dsa_switch *ds)
> +{
> +	struct gsw1xx_priv *priv = container_of(ds->priv, struct gsw1xx_priv, gswip);
> +	struct gswip_priv *gswip_priv = ds->priv;
> +	struct device_node *phy_np;
> +	u32 phy_reset_mask = 0;
> +	struct dsa_port *dp;
> +	int ret;
> +
> +	dsa_switch_for_each_user_port(dp, ds) {
> +		struct phylink_config cfg = {};
> +
> +		/* Is there an internal PHY on this port? */
> +		gswip_priv->hw_info->phylink_get_caps(ds, dp->index, &cfg);
> +		if (!test_bit(PHY_INTERFACE_MODE_INTERNAL, cfg.supported_interfaces))
> +			continue;
> +
> +		/* Will the PHY be really used? */
> +		phy_np = of_parse_phandle(dp->dn, "phy-handle", 0);
> +		if (!phy_np)
> +			continue;
> +
> +		of_node_put(phy_np);
> +		phy_reset_mask |= GSW1XX_RST_REQ_PHY(dp->index);
> +	}
> +
> +	if (!phy_reset_mask)
> +		return 0;
> +
> +	/* Deassert resets only for PHYs referenced by active ports */
> +	ret = regmap_clear_bits(priv->shell, GSW1XX_SHELL_RST_REQ, phy_reset_mask);

Likewise doing the other change may also be a good idea:
Disable unused PHYs for a switch with PS_NOWAIT = 1 strapped.
Ie. use regmap_update_bits on the inverted phy_reset_mask.
This would make us end up with the identical state independently
of PS_NOWAIT being strapped or not.