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Mon, 28 Sep 2026 03:03:15 -0700 (PDT) Date: Mon, 28 Sep 2026 12:03:14 +0200 From: Lorenzo Bianconi To: Sagar Cheluvegowda Cc: Maxime Chevallier , Andrew Lunn , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin , Alexandre Torgue , netdev@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Hongmei Xu , Abhishek Chauhan , Sarosh Hasan Subject: Re: [PATCH] net: stmmac: dwxgmac2: enable L2 split header support Message-ID: References: <20260922232116.889630-1-sagar.cheluvegowda@oss.qualcomm.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha512; protocol="application/pgp-signature"; boundary="1fVf4XHFdNIN3iOa" Content-Disposition: inline In-Reply-To: <20260922232116.889630-1-sagar.cheluvegowda@oss.qualcomm.com> X-Proofpoint-GUID: 93aQMXoQzZRKvRigQeliBnGIWAm-a1Dl X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTI4MDAzOSBTYWx0ZWRfX08p4YgrjLm3Y RLmHWx4BBhqTO97xrHNURCHrIj0ejoXT49ZCj+LGFMSh7UC0Qz9CXgfg1wT+cJjb+8BNImkyH5y Ii0lKdltmo8Pw3XEjqo39i1nXIRhltoXYXxbCCFkwicHgyOiY0YNndlz0kKcCgQK32J/OPT7K23 AT1moG7jBT/Iqc28jqZI5uooMdtsyp3kUZBVWLbDo+PjQ/KAz141It9RuwFyWzHlzeZ6RKKDD8J 3LS71iklV1bTbmvOaRmva4l69CHvYYX1b89jwN4XP0Z9g27lVZ/frMcXAcnPX0zmcOyVLdm6xKJ OUaM4kEaI7BsPTI97Z7TQO4/7XUkcBKyAX8KXz9+dI10PJjEOkxc59n8DZZSGM5A/x+oUNGVpIV h03F4+IeeZkrqxs3gv2jyI8OEbBIQUKWHv+QToiCTCvXevdrV3AWKdBadmNnfkBIeqtnFjL3aQW fGFuMwQPsQ5cIBDX9Hg== X-Proofpoint-Spam-Info: AW1haW4tMjYwOTI4MDAzOSBTYWx0ZWRfX+pBjjPFl/V6x +Bj953mRcCCn6rGivpmxicXmkIOxWhv8ZCjBSzeuCeXRc5rUwkA1arF6meAqAqxiNAdrRJ6RiLD 5FF8ifOLNiTpsk2Wf3EnJdDJUJ8dwbo= X-Proofpoint-ORIG-GUID: 93aQMXoQzZRKvRigQeliBnGIWAm-a1Dl X-Authority-Analysis: v=2.4 cv=MqLHeGae c=1 sm=1 tr=0 ts=6aba3b66 cx=c_pps a=UbhLPJ621ZpgOD2l3yZY1w==:117 a=WpTaRW6qxYHRGzLzQsVYzg==:17 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_K5XuSEh1TEqbUxoQ0s3:22 a=EUspDBNiAAAA:8 a=K8_CPFW8AYnmyr30bPQA:9 a=CjuIK1q_8ugA:10 a=TJw6oMfTIKYT8w6ryAkA:9 a=TOPH6uDL9cOC6tEoww4z:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-28_02,2026-09-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 lowpriorityscore=0 suspectscore=0 impostorscore=0 phishscore=0 adultscore=0 clxscore=1015 priorityscore=1501 spamscore=0 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2609280039 --1fVf4XHFdNIN3iOa Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable > XGMAC2 doesn't program the MAC extended configuration registers > needed for L2 header splitting when split-header mode is enabled, > so tagged AV packets can't use the split-header path. Configure > split mode (SPLM) and header saving (SAVE_EN) in XGMAC_EXT_CFG1, > extending the dwmac4 sequence added by commit d10f1a4e44c3 ("net: > stmmac: Programming sequence for VLAN packets with split header") > to XGMAC2. >=20 > Also fix the RX header-length calculation for split-header > descriptors. Per the XGMAC2 descriptor format, RDES3's L34T and > L2T fields are only valid on the last descriptor (LD set); on a > non-last descriptor they can hold stale write-back data from a > previous packet. Read the header length from RDES2[9:0] directly > for non-last descriptors, and only consult L34T/L2T on the last > descriptor: RDES2[9:0] for IP packets (L34T set) and RDES2[9:2] > for non-IP packets (L2T set). >=20 > Finally, disable the variable-length preamble when L2 splitting > is enabled. A variable-length preamble shifts the position of the > Ethernet header, making the L2 split offset non-deterministic. Hi Sagar, are we missing to set dma_cap->sphen for dwxgmac2? >=20 > Co-developed-by: Abhishek Chauhan > Signed-off-by: Abhishek Chauhan > Co-developed-by: Sarosh Hasan > Signed-off-by: Sarosh Hasan > Signed-off-by: Sagar Cheluvegowda > --- > drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h | 7 +++++++ > drivers/net/ethernet/stmicro/stmmac/dwxgmac2_descs.c | 12 +++++++++++- > drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c | 10 ++++++++++ > 3 files changed, 28 insertions(+), 1 deletion(-) >=20 > diff --git a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h b/drivers/net= /ethernet/stmicro/stmmac/dwxgmac2.h > index f8ab347f7b5b..3ccd29ea7ab0 100644 > --- a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h > +++ b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h > @@ -167,6 +167,11 @@ > #define XGMAC_HW_FEATURE4 0x0000012c > #define XGMAC_HWFEAT_EASP BIT(4) > #define XGMAC_HWFEAT_PCSEL GENMASK(1, 0) > +#define XGMAC_EXT_CFG0 0x140 > +#define XGMAC_EXT_CFG0_VPRE BIT(8) > +#define XGMAC_EXT_CFG1 0x00000144 > +#define XGMAC_CONFIG1_SAVE_EN BIT(24) > +#define XGMAC_CONFIG1_SPLM(v) FIELD_PREP(GENMASK(9, 8), v) I guess it would be better to define a mask for XGMAC_CONFIG1_SPLM. > #define XGMAC_MAC_DPP_FSM_INT_STATUS 0x00000150 > #define XGMAC_MAC_FSM_CONTROL 0x00000158 > #define XGMAC_PRTYEN BIT(1) > @@ -434,6 +439,7 @@ > #define XGMAC_RDES2_L4FM BIT(28) > #define XGMAC_RDES2_L3FM BIT(27) > #define XGMAC_RDES2_HL GENMASK(9, 0) > +#define XGMAC_RDES2_NONIPHL GENMASK(9, 2) > #define XGMAC_RDES3_OWN BIT(31) > #define XGMAC_RDES3_CTXT BIT(30) > #define XGMAC_RDES3_IOC BIT(30) > @@ -441,6 +447,7 @@ > #define XGMAC_RDES3_CDA BIT(27) > #define XGMAC_RDES3_RSV BIT(26) > #define XGMAC_RDES3_L34T GENMASK(23, 20) > +#define XGMAC_RDES3_L2T GENMASK(19, 16) > #define XGMAC_RDES3_ET_LT GENMASK(19, 16) > #define XGMAC_L34T_IP4TCP 0x1 > #define XGMAC_L34T_IP4UDP 0x2 > diff --git a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_descs.c b/drive= rs/net/ethernet/stmicro/stmmac/dwxgmac2_descs.c > index 6719ac6e395b..65ac5403ec58 100644 > --- a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_descs.c > +++ b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_descs.c > @@ -292,8 +292,18 @@ static int dwxgmac2_get_rx_hash(struct dma_desc *p, = u32 *hash, > =20 > static void dwxgmac2_get_rx_header_len(struct dma_desc *p, unsigned int = *len) > { > - if (le32_to_cpu(p->des3) & XGMAC_RDES3_L34T) > + u32 rdes3 =3D le32_to_cpu(p->des3); > + > + /* when FD=3D1 and LD=3D0, HL is RDES2[9:0] */ > + if (!(rdes3 & XGMAC_RDES3_LD)) { > + *len =3D le32_to_cpu(p->des2) & XGMAC_RDES2_HL; If XGMAC_RDES3_L34T is not defined on non-last descriptor, is it fine to us= e it here? IIUC XGMAC_RDES2_HL depends on XGMAC_RDES3_L34T, right? Regards, Lorenzo > + return; > + } > + > + if (rdes3 & XGMAC_RDES3_L34T) > *len =3D le32_to_cpu(p->des2) & XGMAC_RDES2_HL; > + else if (rdes3 & XGMAC_RDES3_L2T) > + *len =3D (le32_to_cpu(p->des2) & XGMAC_RDES2_NONIPHL) >> 2; > } > =20 > static void dwxgmac2_set_sec_addr(struct dma_desc *p, dma_addr_t addr, b= ool is_valid) > diff --git a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c b/drivers= /net/ethernet/stmicro/stmmac/dwxgmac2_dma.c > index ff83858ebc1f..0a9c787305a4 100644 > --- a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c > +++ b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c > @@ -561,6 +561,16 @@ static void dwxgmac2_enable_sph(struct stmmac_priv *= priv, void __iomem *ioaddr, > value |=3D XGMAC_CONFIG_HDSMS_256; /* Segment max 256 bytes */ > writel(value, ioaddr + XGMAC_RX_CONFIG); > =20 > + value =3D readl(ioaddr + XGMAC_EXT_CFG1); > + value |=3D XGMAC_CONFIG1_SPLM(1); > + value |=3D XGMAC_CONFIG1_SAVE_EN; > + writel(value, ioaddr + XGMAC_EXT_CFG1); > + > + /* Disable variable preambles to keep the L2 split offset deterministic= =2E */ > + value =3D readl(ioaddr + XGMAC_EXT_CFG0); > + value &=3D ~XGMAC_EXT_CFG0_VPRE; > + writel(value, ioaddr + XGMAC_EXT_CFG0); > + > value =3D readl(ioaddr + XGMAC_DMA_CH_CONTROL(chan)); > if (en) > value |=3D XGMAC_SPH; > --=20 > 2.34.1 >=20 --1fVf4XHFdNIN3iOa Content-Type: application/pgp-signature; name=signature.asc -----BEGIN PGP SIGNATURE----- iHUEABYKAB0WIQTquNwa3Txd3rGGn7Y6cBh0uS2trAUCaro7YgAKCRA6cBh0uS2t rGapAQDF8c4yUG8tWu9uZdll6p/lHuMxVFLaEaWwC2q9s2iUYwD9FX9szV+sTCiG qc7P6ESar2kzpaNwY/frERSXqNcCoAI= =py7a -----END PGP SIGNATURE----- --1fVf4XHFdNIN3iOa--