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Fri, 06 Nov 2026 04:27:29 -0800 (PST) Received: from localhost ([208.127.45.21]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4b6e1b5d745sm51444055e9.6.2026.11.06.04.27.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 06 Nov 2026 04:27:28 -0800 (PST) Date: Fri, 6 Nov 2026 13:27:24 +0100 From: Jiri Pirko To: Petr Oros Cc: netdev@vger.kernel.org, Jonathan Corbet , Shuah Khan , Shuah Khan , Randy Dunlap , Jani Nikula , Vadim Fedorenko , Arkadiusz Kubalewski , Ivan Vecera , Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org Subject: Re: [PATCH net-next v2 00/14] dpll: add a simulated DPLL device driver Message-ID: References: <20261105151852.1844305-1-poros@redhat.com> X-Mailing-List: netdev@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20261105151852.1844305-1-poros@redhat.com> Thu, Nov 05, 2026 at 04:18:38PM +0100, poros@redhat.com wrote: >The DPLL subsystem has no in-tree driver that can run without real >hardware, so core changes and userspace tooling are hard to exercise in >CI, and the pin-on-pin and reference sync paths see almost no coverage >outside the vendors' labs. This series adds dpllsim, a simulated DPLL >device driver, together with selftests that run against it. > >The driver is controlled through configfs, following gpio-sim. Writing a >clock ID into a device directory and setting "live" to 1 registers a >DPLL device with the core. Pins are directories under pins/ with their >type, frequency, direction and priority as attributes, and all of them >are registered when the device goes live. The split between creating >the configuration and going live keeps the register and unregister >paths reachable from userspace, so they can be exercised repeatedly >without reloading the module. Nothing in the simulator is a stable ABI. > >The patches follow the shape of the zl3073x introduction. The >driver starts with the device alone, then gains pins and the static pin >operations one at a time (state, priority, frequency, phase adjustment), >and every feature patch is followed by the selftest that covers it. The >last two patches add concurrency stress tests and reference tracker >leak tests for the lifecycle paths. > >The simulation loop (lock state machine, phase and frequency >measurements, monitoring features), the topology features (MUX pin >hierarchies, reference sync, media failure injection), netdevsim >integration and device mode setting follow in two further series once >this one is in, to stay within the 15 patch limit. > >The driver and the selftests were developed with an LLM coding >assistant (Claude Code) working under my direction. I chose the >configfs design, the split into one feature per patch and the test >scenarios, and I reviewed every line. The assistant wrote most of the >code and the first drafts of the changelogs, and it found and fixed >bugs by running the suite on the lab host. The series then went >through several rounds of an LLM based patch reviewer whose findings >were fixed, and through a mutation test in which deliberately broken >driver and core code was caught by the tests. > >The selftests live in tools/testing/selftests/drivers/net/dpll and run >with "make -C tools/testing/selftests TARGETS=drivers/net/dpll >run_tests". By default they create dpllsim devices; with >DPLL_DEV_ID= the basic and feature scripts run against an existing >device instead, so the same suite exercises real hardware. The whole >suite was run through the kselftest runner on an ice E810 host with >CONFIG_KASAN, CONFIG_PROVE_LOCKING and CONFIG_DPLL_REFCNT_TRACKER >enabled, against the simulator and, with DPLL_DEV_ID, against the ice >DPLL, where the tests that need a simulator skip and the pin state and >priorities of the hardware are left as they were. All pass with no >warnings in dmesg. > set- Acked-by: Jiri Pirko