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From: Ivan Vecera <ivecera@redhat.com>
To: Andrew Lunn <andrew@lunn.ch>
Cc: Krzysztof Kozlowski <krzk@kernel.org>,
	netdev@vger.kernel.org,
	Vadim Fedorenko <vadim.fedorenko@linux.dev>,
	Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>,
	Jiri Pirko <jiri@resnulli.us>, Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Prathosh Satish <Prathosh.Satish@microchip.com>,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	Michal Schmidt <mschmidt@redhat.com>,
	Petr Oros <poros@redhat.com>
Subject: Re: [PATCH net-next 1/2] dt-bindings: dpll: Add clock ID property
Date: Tue, 5 Aug 2025 17:26:17 +0200	[thread overview]
Message-ID: <b33c76da-8ce1-402f-b252-f6d439ec39c7@redhat.com> (raw)
In-Reply-To: <1419bca0-b85a-4d4b-af1a-b0540c25933a@lunn.ch>

On 04. 08. 25 8:45 odp., Andrew Lunn wrote:
>> Let's say we have a SyncE setup with two network controllers where each
>> of them feeds a DPLL channel with recovered clock received from some of
>> its PHY. The DPLL channel cleans/stabilizes this input signal (generates
>> phase aligned signal locked to the same frequency as the input one) and
>> routes it back to the network controller.
>>
>>      +-----------+
>>   +--|   NIC 1   |<-+
>>   |  +-----------+  |
>>   |                 |
>>   | RxCLK     TxCLK |
>>   |                 |
>>   |  +-----------+  |
>>   +->| channel 1 |--+
>>      |-- DPLL ---|
>>   +->| channel 2 |--+
>>   |  +-----------+  |
>>   |                 |
>>   | RxCLK     TxCLK |
>>   |                 |
>>   |  +-----------+  |
>>   +--|   NIC 2   |<-+
>>      +-----------+
>>
>> The PHCs implemented by the NICs have associated the ClockIdentity
>> (according IEEE 1588-2008) whose value is typically derived from
>> the NIC's MAC address using EUI-64. The DPLL channel should be
>> registered to DPLL subsystem using the same ClockIdentity as the PHC
>> it drives. In above example DPLL channel 1 should have the same clock ID
>> as NIC1 PHC and channel 2 as NIC2 PHC.
>>
>> During the discussion, Andrew had the idea to provide NIC phandles
>> instead of clock ID values.
>>
>> Something like this:
>>
>> diff --git a/Documentation/devicetree/bindings/dpll/dpll-device.yaml
>> b/Documenta
>> tion/devicetree/bindings/dpll/dpll-device.yaml
>> index fb8d7a9a3693f..159d9253bc8ae 100644
>> --- a/Documentation/devicetree/bindings/dpll/dpll-device.yaml
>> +++ b/Documentation/devicetree/bindings/dpll/dpll-device.yaml
>> @@ -33,6 +33,13 @@ properties:
>>       items:
>>         enum: [pps, eec]
>>
>> +  ethernet-handles:
>> +    description:
>> +      List of phandles to Ethernet devices, one per DPLL instance. Each of
>> +      these handles identifies Ethernet device that uses particular DPLL
>> +      instance to synchronize its hardware clock.
>> +    $ref: /schemas/types.yaml#/definitions/phandle-array
>> +
> 
> I personally would not use a list. I would have a node per channel,
> and within that node, have the ethernet-handle property. This gives
> you a more flexible scheme where you can easily add more per channel
> properties in the future.
> 
> It took us a while to understand what you actually wanted. The ASCII
> art helps. So i would include that and some text in the binding.

Like this?

diff --git a/Documentation/devicetree/bindings/dpll/dpll-device.yaml 
b/Documentation/devicetree/bindings/dpll/dpll-device.yaml
index fb8d7a9a3693f..798c5484657cf 100644
--- a/Documentation/devicetree/bindings/dpll/dpll-device.yaml
+++ b/Documentation/devicetree/bindings/dpll/dpll-device.yaml
@@ -27,11 +27,41 @@ properties:
    "#size-cells":
      const: 0

-  dpll-types:
-    description: List of DPLL channel types, one per DPLL instance.
-    $ref: /schemas/types.yaml#/definitions/non-unique-string-array
-    items:
-      enum: [pps, eec]
+  channels:
+    type: object
+    description: DPLL channels
+    unevaluatedProperties: false
+
+    properties:
+      "#address-cells":
+        const: 1
+      "#size-cells":
+        const: 0
+
+    patternProperties:
+      "^channel@[0-9a-f]+$":
+        type: object
+        description: DPLL channel
+        unevaluatedProperties: false
+
+        properties:
+          reg:
+            description: Hardware index of the DPLL channel
+            maxItems: 1
+
+          dpll-type:
+            description: DPLL channel type
+            $ref: /schemas/types.yaml#/definitions/string
+            enum: [pps, eec]
+
+          ethernet-handle:
+            description:
+              Specifies a reference to a node representing an Ethernet 
device
+              that uses this channel to synchronize its hardware clock.
+            $ref: /schemas/types.yaml#/definitions/phandle
+
+        required:
+          - reg

Thanks,
Ivan


  reply	other threads:[~2025-08-05 15:26 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-07-17 17:10 [PATCH net-next 0/2] dpll: zl3073x: Read clock ID from device property Ivan Vecera
2025-07-17 17:10 ` [PATCH net-next 1/2] dt-bindings: dpll: Add clock ID property Ivan Vecera
2025-07-18  6:55   ` Krzysztof Kozlowski
2025-07-18 12:16     ` Ivan Vecera
2025-07-21  9:23       ` Krzysztof Kozlowski
2025-07-21 12:54         ` Ivan Vecera
2025-07-23  6:25           ` Krzysztof Kozlowski
2025-07-23  7:23             ` Ivan Vecera
2025-08-03 11:12               ` Krzysztof Kozlowski
2025-08-04 18:26                 ` Ivan Vecera
2025-08-04 18:45                   ` Andrew Lunn
2025-08-05 15:26                     ` Ivan Vecera [this message]
2025-08-05 15:31                       ` Andrew Lunn
2025-07-17 17:11 ` [PATCH net-next 2/2] dpll: zl3073x: Initialize clock ID from device property Ivan Vecera

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