From: Wojciech Drewek <wojciech.drewek@intel.com>
To: Geetha sowjanya <gakula@marvell.com>, <netdev@vger.kernel.org>,
<linux-kernel@vger.kernel.org>
Cc: <kuba@kernel.org>, <davem@davemloft.net>, <pabeni@redhat.com>,
<edumazet@google.com>, <sgoutham@marvell.com>,
<sbhatta@marvell.com>, <hkelam@marvell.com>
Subject: Re: [net PATCH 3/5] octeontx2-af: Fix mcs stats register address
Date: Thu, 23 Nov 2023 11:53:55 +0100 [thread overview]
Message-ID: <b84db4ac-eaa9-4fc8-9ce6-00da03ab711f@intel.com> (raw)
In-Reply-To: <20231123055941.19430-4-gakula@marvell.com>
On 23.11.2023 06:59, Geetha sowjanya wrote:
> This patch adds the miss mcs stats register
> for mcs supported platforms.
>
> Fixes: 9312150af8da ("octeontx2-af: cn10k: mcs: Support for stats collection")
> Signed-off-by: Geetha sowjanya <gakula@marvell.com>
> ---
Reviewed-by: Wojciech Drewek <wojciech.drewek@intel.com>
> .../net/ethernet/marvell/octeontx2/af/mcs.c | 4 +--
> .../ethernet/marvell/octeontx2/af/mcs_reg.h | 31 ++++++++++++++++---
> 2 files changed, 29 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/net/ethernet/marvell/octeontx2/af/mcs.c b/drivers/net/ethernet/marvell/octeontx2/af/mcs.c
> index d6effbe46208..d4a4e4c837ec 100644
> --- a/drivers/net/ethernet/marvell/octeontx2/af/mcs.c
> +++ b/drivers/net/ethernet/marvell/octeontx2/af/mcs.c
> @@ -117,7 +117,7 @@ void mcs_get_rx_secy_stats(struct mcs *mcs, struct mcs_secy_stats *stats, int id
> reg = MCSX_CSE_RX_MEM_SLAVE_INPKTSSECYTAGGEDCTLX(id);
> stats->pkt_tagged_ctl_cnt = mcs_reg_read(mcs, reg);
>
> - reg = MCSX_CSE_RX_MEM_SLAVE_INPKTSSECYUNTAGGEDORNOTAGX(id);
> + reg = MCSX_CSE_RX_MEM_SLAVE_INPKTSSECYUNTAGGEDX(id);
> stats->pkt_untaged_cnt = mcs_reg_read(mcs, reg);
>
> reg = MCSX_CSE_RX_MEM_SLAVE_INPKTSSECYCTLX(id);
> @@ -215,7 +215,7 @@ void mcs_get_sc_stats(struct mcs *mcs, struct mcs_sc_stats *stats,
> reg = MCSX_CSE_RX_MEM_SLAVE_INPKTSSCNOTVALIDX(id);
> stats->pkt_notvalid_cnt = mcs_reg_read(mcs, reg);
>
> - reg = MCSX_CSE_RX_MEM_SLAVE_INPKTSSCUNCHECKEDOROKX(id);
> + reg = MCSX_CSE_RX_MEM_SLAVE_INPKTSSCUNCHECKEDX(id);
> stats->pkt_unchecked_cnt = mcs_reg_read(mcs, reg);
>
> if (mcs->hw->mcs_blks > 1) {
> diff --git a/drivers/net/ethernet/marvell/octeontx2/af/mcs_reg.h b/drivers/net/ethernet/marvell/octeontx2/af/mcs_reg.h
> index f3ab01fc363c..f4c6de89002c 100644
> --- a/drivers/net/ethernet/marvell/octeontx2/af/mcs_reg.h
> +++ b/drivers/net/ethernet/marvell/octeontx2/af/mcs_reg.h
> @@ -810,14 +810,37 @@
> offset = 0x9d8ull; \
> offset; })
>
> +#define MCSX_CSE_RX_MEM_SLAVE_INPKTSSCUNCHECKEDX(a) ({ \
> + u64 offset; \
> + \
> + offset = 0xee80ull; \
> + if (mcs->hw->mcs_blks > 1) \
> + offset = 0xe818ull; \
> + offset += (a) * 0x8ull; \
> + offset; })
> +
> +#define MCSX_CSE_RX_MEM_SLAVE_INPKTSSECYUNTAGGEDX(a) ({ \
> + u64 offset; \
> + \
> + offset = 0xa680ull; \
> + if (mcs->hw->mcs_blks > 1) \
> + offset = 0xd018ull; \
> + offset += (a) * 0x8ull; \
> + offset; })
> +
> +#define MCSX_CSE_RX_MEM_SLAVE_INPKTSSCLATEORDELAYEDX(a) ({ \
> + u64 offset; \
> + \
> + offset = 0xf680ull; \
> + if (mcs->hw->mcs_blks > 1) \
> + offset = 0xe018ull; \
> + offset += (a) * 0x8ull; \
> + offset; })
> +
> #define MCSX_CSE_RX_MEM_SLAVE_INOCTETSSCDECRYPTEDX(a) (0xe680ull + (a) * 0x8ull)
> #define MCSX_CSE_RX_MEM_SLAVE_INOCTETSSCVALIDATEX(a) (0xde80ull + (a) * 0x8ull)
> -#define MCSX_CSE_RX_MEM_SLAVE_INPKTSSECYUNTAGGEDORNOTAGX(a) (0xa680ull + (a) * 0x8ull)
> #define MCSX_CSE_RX_MEM_SLAVE_INPKTSSECYNOTAGX(a) (0xd218 + (a) * 0x8ull)
> -#define MCSX_CSE_RX_MEM_SLAVE_INPKTSSECYUNTAGGEDX(a) (0xd018ull + (a) * 0x8ull)
> -#define MCSX_CSE_RX_MEM_SLAVE_INPKTSSCUNCHECKEDOROKX(a) (0xee80ull + (a) * 0x8ull)
> #define MCSX_CSE_RX_MEM_SLAVE_INPKTSSECYCTLX(a) (0xb680ull + (a) * 0x8ull)
> -#define MCSX_CSE_RX_MEM_SLAVE_INPKTSSCLATEORDELAYEDX(a) (0xf680ull + (a) * 0x8ull)
> #define MCSX_CSE_RX_MEM_SLAVE_INPKTSSAINVALIDX(a) (0x12680ull + (a) * 0x8ull)
> #define MCSX_CSE_RX_MEM_SLAVE_INPKTSSANOTUSINGSAERRORX(a) (0x15680ull + (a) * 0x8ull)
> #define MCSX_CSE_RX_MEM_SLAVE_INPKTSSANOTVALIDX(a) (0x13680ull + (a) * 0x8ull)
next prev parent reply other threads:[~2023-11-23 10:54 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-23 5:59 [net PATCH 0/5] octeontx2-af: miscellaneous fixes Geetha sowjanya
2023-11-23 5:59 ` [net PATCH 1/5] octeontx2-af: Adjust Tx credits when MCS external bypass is disabled Geetha sowjanya
2023-11-23 10:45 ` Wojciech Drewek
2023-11-23 12:34 ` [EXT] " Geethasowjanya Akula
2023-11-23 12:47 ` Wojciech Drewek
2023-11-23 5:59 ` [net PATCH 2/5] octeontx2-af: Fix mcs sa cam entries size Geetha sowjanya
2023-11-23 10:47 ` Wojciech Drewek
2023-11-23 5:59 ` [net PATCH 3/5] octeontx2-af: Fix mcs stats register address Geetha sowjanya
2023-11-23 10:53 ` Wojciech Drewek [this message]
2023-11-23 5:59 ` [net PATCH 4/5] octeontx2-af: Add missing mcs flr handler call Geetha sowjanya
2023-11-23 10:55 ` Wojciech Drewek
2023-11-23 5:59 ` [net PATCH 5/5] octeontx2-af: Update Tx link register range Geetha sowjanya
2023-11-23 10:57 ` Wojciech Drewek
2023-11-23 12:45 ` [EXT] " Geethasowjanya Akula
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