From: Heiko Schocher <hs@nabladev.com>
To: Paolo Abeni <pabeni@redhat.com>, netdev@vger.kernel.org
Cc: Andrew Lunn <andrew@lunn.ch>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Heiner Kallweit <hkallweit1@gmail.com>,
Jakub Kicinski <kuba@kernel.org>,
Russell King <linux@armlinux.org.uk>,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v1] net: phy: dp83869: fix setting CLK_O_SEL field.
Date: Tue, 28 Apr 2026 15:54:49 +0200 [thread overview]
Message-ID: <ba6f9b8e-f4e1-4368-0829-526cf9d6da9f@nabladev.com> (raw)
In-Reply-To: <fcb880c0-40d3-4613-af73-f1cdd1764975@redhat.com>
Hello Paolo,
On 28.04.26 15:50, Paolo Abeni wrote:
> On 4/25/26 5:13 AM, Heiko Schocher wrote:
>> Table 7-121 in datasheet says we have to set register 0xc6
>> to value 0x10 before CLK_O_SEL can be modified. No more infos
>> about this field found in datasheet. With this fix, setting
>> of CLK_O_SEL field in IO_MUX_CFG register worked through dts
>> property "ti,clk-output-sel" on a DP83869HMRGZR.
>>
>> Signed-off-by: Heiko Schocher <hs@nabladev.com>
>
> Note that a required fixes tag is missing here:
>
> Fixes: 01db923e8377 ("net: phy: dp83869: Add TI dp83869 phy")
Should I resend a v2 patch with this tag added ?
Thanks!
bye,
Heiko
>
> /P
>
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next prev parent reply other threads:[~2026-04-28 13:55 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-25 3:13 [PATCH v1] net: phy: dp83869: fix setting CLK_O_SEL field Heiko Schocher
2026-04-28 13:01 ` Simon Horman
2026-04-28 13:50 ` Paolo Abeni
2026-04-28 13:54 ` Heiko Schocher [this message]
2026-04-28 14:00 ` patchwork-bot+netdevbpf
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