From: Alejandro Lucero Palau <alucerop@amd.com>
To: Jonathan Cameron <Jonathan.Cameron@Huawei.com>,
alejandro.lucero-palau@amd.com
Cc: linux-cxl@vger.kernel.org, netdev@vger.kernel.org,
dan.j.williams@intel.com, martin.habets@xilinx.com,
edward.cree@amd.com, davem@davemloft.net, kuba@kernel.org,
pabeni@redhat.com, edumazet@google.com, richard.hughes@amd.com
Subject: Re: [PATCH v2 10/15] cxl: define a driver interface for DPA allocation
Date: Mon, 19 Aug 2024 16:52:34 +0100 [thread overview]
Message-ID: <bc823ebe-b887-bc54-0651-b28362a49a7c@amd.com> (raw)
In-Reply-To: <20240804190718.0000361c@Huawei.com>
On 8/4/24 19:07, Jonathan Cameron wrote:
> On Mon, 15 Jul 2024 18:28:30 +0100
> alejandro.lucero-palau@amd.com wrote:
>
>> From: Alejandro Lucero <alucerop@amd.com>
>>
>> Region creation involves finding available DPA (device-physical-address)
>> capacity to map into HPA (host-physical-address) space. Given the HPA
>> capacity constraint, define an API, cxl_request_dpa(), that has the
>> flexibility to map the minimum amount of memory the driver needs to
>> operate vs the total possible that can be mapped given HPA availability.
>>
>> Factor out the core of cxl_dpa_alloc, that does free space scanning,
>> into a cxl_dpa_freespace() helper, and use that to balance the capacity
>> available to map vs the @min and @max arguments to cxl_request_dpa.
>>
>> Based on https://lore.kernel.org/linux-cxl/168592149709.1948938.8663425987110396027.stgit@dwillia2-xfh.jf.intel.com/T/#m4271ee49a91615c8af54e3ab20679f8be3099393
>>
> Use the permalink link under these to get shorter links.
> https://lore.kernel.org/linux-cxl/168592158743.1948938.7622563891193802610.stgit@dwillia2-xfh.jf.intel.com/
> goes to the same patch.
I'll do.
>
>> Signed-off-by: Alejandro Lucero <alucerop@amd.com>
>> Co-developed-by: Dan Williams <dan.j.williams@intel.com>
>
>> +
>> +int cxl_dpa_alloc(struct cxl_endpoint_decoder *cxled, unsigned long long size)
>> +{
>> + struct cxl_port *port = cxled_to_port(cxled);
>> + struct device *dev = &cxled->cxld.dev;
>> + resource_size_t start, avail, skip;
>> + int rc;
>> +
>> + down_write(&cxl_dpa_rwsem);
> Some cleanup.h magic would help here by allowing early returns.
> Needs the scoped lock though to ensure it's released before the
> devm_add_action_or_reset() as I'd guess we will deadlock otherwise
> if that fails.
Yes, I'll try to use it making cleaner code.
>> + if (cxled->cxld.region) {
>> + dev_dbg(dev, "EBUSY, decoder attached to %s\n",
>> + dev_name(&cxled->cxld.region->dev));
>> + rc = -EBUSY;
>> goto out;
>> }
>>
>> + if (cxled->cxld.flags & CXL_DECODER_F_ENABLE) {
>> + dev_dbg(dev, "EBUSY, decoder enabled\n");
>> + rc = -EBUSY;
>> + goto out;
>> + }
>> +
>> + avail = cxl_dpa_freespace(cxled, &start, &skip);
>> +
>> if (size > avail) {
>> dev_dbg(dev, "%pa exceeds available %s capacity: %pa\n", &size,
>> - cxl_decoder_mode_name(cxled->mode), &avail);
>> + cxled->mode == CXL_DECODER_RAM ? "ram" : "pmem",
>> + &avail);
>> rc = -ENOSPC;
>> goto out;
>> }
>> @@ -550,6 +570,99 @@ int cxl_dpa_alloc(struct cxl_endpoint_decoder *cxled, unsigned long long size)
>> return devm_add_action_or_reset(&port->dev, cxl_dpa_release, cxled);
>> }
>>
>> +static int find_free_decoder(struct device *dev, void *data)
>> +{
>> + struct cxl_endpoint_decoder *cxled;
>> + struct cxl_port *port;
>> +
>> + if (!is_endpoint_decoder(dev))
>> + return 0;
>> +
>> + cxled = to_cxl_endpoint_decoder(dev);
>> + port = cxled_to_port(cxled);
>> +
>> + if (cxled->cxld.id != port->hdm_end + 1) {
>> + return 0;
> No brackets
Sure.
>> + }
>> + return 1;
>> +}
>> +
>> +/**
>> + * cxl_request_dpa - search and reserve DPA given input constraints
>> + * @endpoint: an endpoint port with available decoders
>> + * @mode: DPA operation mode (ram vs pmem)
>> + * @min: the minimum amount of capacity the call needs
>> + * @max: extra capacity to allocate after min is satisfied
>> + *
>> + * Given that a region needs to allocate from limited HPA capacity it
>> + * may be the case that a device has more mappable DPA capacity than
>> + * available HPA. So, the expectation is that @min is a driver known
>> + * value for how much capacity is needed, and @max is based the limit of
>> + * how much HPA space is available for a new region.
> We are going to need a policy control on the max value.
> Otherwise, if you have two devices that support huge capacity and
> not enough space, who gets it will just be a race.
>
> Not a problem for now though!
I agree. If CXL ends up being what we hope, these races will need to be
better handled.
Thanks!
>> + *
>> + * Returns a pinned cxl_decoder with at least @min bytes of capacity
>> + * reserved, or an error pointer. The caller is also expected to own the
>> + * lifetime of the memdev registration associated with the endpoint to
>> + * pin the decoder registered as well.
>> + */
>
>
next prev parent reply other threads:[~2024-08-19 15:53 UTC|newest]
Thread overview: 114+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-07-15 17:28 [PATCH v2 00/15] cxl: add Type2 device support alejandro.lucero-palau
2024-07-15 17:28 ` [PATCH v2 01/15] cxl: add type2 device basic support alejandro.lucero-palau
2024-07-15 18:48 ` Andrew Lunn
2024-07-16 8:50 ` Alejandro Lucero Palau
2024-07-16 1:57 ` kernel test robot
2024-07-18 23:12 ` Dave Jiang
2024-07-19 6:03 ` Alejandro Lucero Palau
2024-08-04 16:44 ` Jonathan Cameron
2024-08-09 7:26 ` Alejandro Lucero Palau
2024-08-04 17:10 ` Jonathan Cameron
2024-08-12 11:16 ` Alejandro Lucero Palau
2024-08-13 8:30 ` Alejandro Lucero Palau
2024-08-15 16:38 ` Jonathan Cameron
2024-08-19 11:12 ` Alejandro Lucero Palau
2024-08-20 10:44 ` Alejandro Lucero Palau
2024-08-15 16:35 ` Jonathan Cameron
2024-08-19 11:10 ` Alejandro Lucero Palau
2024-08-27 15:06 ` Jonathan Cameron
2024-08-09 8:34 ` Zhi Wang
2024-08-12 11:34 ` Alejandro Lucero Palau
2024-08-17 20:32 ` Zhi Wang
2024-08-19 11:13 ` Alejandro Lucero Palau
2024-07-15 17:28 ` [PATCH v2 02/15] cxl: add function for type2 cxl regs setup alejandro.lucero-palau
2024-07-16 6:26 ` Li, Ming4
2024-08-14 7:46 ` Alejandro Lucero Palau
2024-07-18 23:27 ` Dave Jiang
2024-08-14 7:49 ` Alejandro Lucero Palau
2024-08-04 17:15 ` Jonathan Cameron
2024-08-14 7:56 ` Alejandro Lucero Palau
2024-08-15 16:40 ` Jonathan Cameron
2024-08-18 8:07 ` Zhi Wang
2024-08-19 11:28 ` Alejandro Lucero Palau
2024-07-15 17:28 ` [PATCH v2 03/15] cxl: add function for type2 resource request alejandro.lucero-palau
2024-07-18 23:36 ` Dave Jiang
2024-08-04 17:16 ` Jonathan Cameron
2024-08-14 8:08 ` Alejandro Lucero Palau
2024-08-14 8:00 ` Alejandro Lucero Palau
2024-08-09 9:01 ` Zhi Wang
2024-08-22 13:07 ` Zhi Wang
2024-08-23 9:30 ` Alejandro Lucero Palau
2024-07-15 17:28 ` [PATCH v2 04/15] cxl: add capabilities field to cxl_dev_state alejandro.lucero-palau
2024-07-19 19:01 ` Dave Jiang
2024-07-23 13:43 ` Alejandro Lucero Palau
2024-08-09 10:25 ` Zhi Wang
2024-08-15 15:37 ` Alejandro Lucero Palau
2024-08-18 6:55 ` Zhi Wang
2024-08-19 13:14 ` Alejandro Lucero Palau
2024-08-04 17:22 ` Jonathan Cameron
2024-08-15 15:43 ` Alejandro Lucero Palau
2024-08-09 9:10 ` Zhi Wang
2024-08-15 15:20 ` Alejandro Lucero Palau
2024-07-15 17:28 ` [PATCH v2 05/15] cxl: fix use of resource_contains alejandro.lucero-palau
2024-07-24 21:25 ` fan
2024-08-16 14:43 ` Alejandro Lucero Palau
2024-08-04 17:25 ` Jonathan Cameron
2024-08-16 14:37 ` Alejandro Lucero Palau
2024-08-27 15:12 ` Jonathan Cameron
2024-08-09 9:14 ` Zhi Wang
2024-08-16 14:42 ` Alejandro Lucero Palau
2024-07-15 17:28 ` [PATCH v2 06/15] cxl: add function for setting media ready by an accelerator alejandro.lucero-palau
2024-08-04 17:26 ` Jonathan Cameron
2024-08-16 14:54 ` Alejandro Lucero Palau
2024-07-15 17:28 ` [PATCH v2 07/15] cxl: support type2 memdev creation alejandro.lucero-palau
2024-07-24 21:32 ` fan
2024-08-16 14:57 ` Alejandro Lucero Palau
2024-08-04 17:31 ` Jonathan Cameron
2024-08-16 15:00 ` Alejandro Lucero Palau
2024-07-15 17:28 ` [PATCH v2 08/15] cxl: indicate probe deferral alejandro.lucero-palau
2024-07-16 5:52 ` Li, Ming4
2024-07-16 8:10 ` Alejandro Lucero Palau
2024-07-30 16:43 ` Fan Ni
2024-08-04 17:41 ` Jonathan Cameron
2024-08-19 13:54 ` Alejandro Lucero Palau
2024-08-09 14:40 ` Zhi Wang
2024-08-26 17:42 ` Zhi Wang
2024-08-28 13:43 ` Alejandro Lucero Palau
2024-07-15 17:28 ` [PATCH v2 09/15] cxl: define a driver interface for HPA free space enumaration alejandro.lucero-palau
2024-07-16 0:53 ` kernel test robot
2024-07-16 6:06 ` Li, Ming4
2024-07-24 8:24 ` Alejandro Lucero Palau
2024-07-25 5:51 ` Li, Ming4
2024-07-25 11:59 ` Alejandro Lucero Palau
2024-08-04 17:57 ` Jonathan Cameron
2024-08-19 14:47 ` Alejandro Lucero Palau
2024-08-27 15:18 ` Jonathan Cameron
2024-08-28 10:18 ` Alejandro Lucero Palau
2024-08-28 11:19 ` Jonathan Cameron
2024-08-28 10:41 ` Alejandro Lucero Palau
2024-08-28 11:26 ` Jonathan Cameron
2024-08-28 13:08 ` Alejandro Lucero Palau
2024-07-15 17:28 ` [PATCH v2 10/15] cxl: define a driver interface for DPA allocation alejandro.lucero-palau
2024-07-16 3:32 ` kernel test robot
2024-08-04 18:07 ` Jonathan Cameron
2024-08-19 15:52 ` Alejandro Lucero Palau [this message]
2024-08-06 17:33 ` Fan Ni
2024-08-19 15:57 ` Alejandro Lucero Palau
2024-07-15 17:28 ` [PATCH v2 11/15] cxl: make region type based on endpoint type alejandro.lucero-palau
2024-07-16 7:14 ` Li, Ming4
2024-07-16 8:13 ` Alejandro Lucero Palau
2024-08-28 16:06 ` Alejandro Lucero Palau
2024-07-15 17:28 ` [PATCH v2 12/15] cxl: allow region creation by type2 drivers alejandro.lucero-palau
2024-08-04 18:29 ` Jonathan Cameron
2024-08-19 16:11 ` Alejandro Lucero Palau
2024-08-22 13:12 ` Zhi Wang
2024-08-23 9:31 ` Alejandro Lucero Palau
2024-08-27 15:20 ` Jonathan Cameron
2024-07-15 17:28 ` [PATCH v2 13/15] cxl: preclude device memory to be used for dax alejandro.lucero-palau
2024-07-15 17:28 ` [PATCH v2 14/15] cxl: add function for obtaining params from a region alejandro.lucero-palau
2024-08-09 15:24 ` Zhi Wang
2024-08-19 16:14 ` Alejandro Lucero Palau
2024-07-15 17:28 ` [PATCH v2 15/15] efx: support pio mapping based on cxl alejandro.lucero-palau
2024-08-04 18:13 ` Jonathan Cameron
2024-08-19 16:28 ` Alejandro Lucero Palau
2024-08-27 15:23 ` Jonathan Cameron
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