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(2a02-a466-4d7a-0-d90f-783f-2e2e-893d.fixed6.kpn.net. [2a02:a466:4d7a:0:d90f:783f:2e2e:893d]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-6a9b594f0fasm778079a12.25.2026.09.11.05.19.19 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 11 Sep 2026 05:19:20 -0700 (PDT) Message-ID: Date: Fri, 11 Sep 2026 14:19:19 +0200 Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5 2/7] arm64: dts: rockchip: describe PCIe RTL8125 Ethernet on NanoPC-T6 To: Diederik de Haas , Heiner Kallweit , nic_swsd@realtek.com, Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner Cc: Sebastian Reichel , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org References: <20260910-rk3588-dts-rtl-eth-describe-dt-alias-v5-0-c1b9e5f10cd6@pardini.net> <20260910-rk3588-dts-rtl-eth-describe-dt-alias-v5-2-c1b9e5f10cd6@pardini.net> Content-Language: en-US From: Ricardo Pardini In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 11/09/2026 11:52, Diederik de Haas wrote: > On Thu Sep 10, 2026 at 10:07 PM CEST, Ricardo Pardini via B4 Relay wrote: >> From: Ricardo Pardini >> >> The FriendlyElec NanoPC-T6 carries two on-board Realtek RTL8125 NICs >> behind pcie2x1l0 and pcie2x1l2. >> >> Describe the fixed function nodes and attach ethernet0/ethernet1 >> aliases, so that U-Boot's fdt_fixup_ethernet() can fill in the MAC >> from its ethaddr/eth1addr env. The on-NIC EEPROMs on this board are >> not pre-programmed with a unique MAC, so this gives a stable MAC >> across boots that both U-Boot and the kernel agree on. >> >> Signed-off-by: Ricardo Pardini >> --- >> arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi | 30 ++++++++++++++++++++++ >> 1 file changed, 30 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi >> index cfdb5c13f8606..550358a756618 100644 >> --- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi >> +++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi >> @@ -20,6 +20,8 @@ / { >> compatible = "friendlyarm,nanopc-t6", "rockchip,rk3588"; >> >> aliases { >> + ethernet0 = &rtl_eth0; >> + ethernet1 = &rtl_eth1; >> mmc0 = &sdhci; >> mmc1 = &sdmmc; >> }; >> @@ -644,6 +646,20 @@ &pcie2x1l0 { >> pinctrl-names = "default"; >> pinctrl-0 = <&pcie2_0_rst>; > > The new pinctrl reference is ``pcie_25glan_perstb_b_pin``, so this patch needs > to be rebased. Indeed; I sent v5 vs v7.3-rc2 which doesn't have your recent series fixing those. I've rebased onto next-20260910 which does, will send in a v6 - but it's really just fuzz/context changes. I'll wait a bit until Heiner/Krysztof/Heiko chime in ref the binding and its wording as that has been contentious in the previous versions. And who knows what Sashiko will find this time. > >> status = "okay"; >> + >> + pcie@0,0 { >> + reg = <0x200000 0 0 0 0>; >> + #address-cells = <3>; >> + #size-cells = <2>; >> + ranges; >> + device_type = "pci"; >> + bus-range = <0x21 0x2f>; >> + >> + rtl_eth0: ethernet@0,0 { >> + compatible = "pci10ec,8125"; >> + reg = <0x210000 0 0 0 0>; >> + }; > > Described on page 23 of the schematic titled '2.5G Ethernet B' and ``U12`` > (ie RTL8125BG) is connected to LAN2 which has ``ETH2`` as label on the case. Confirmed. > >> + }; >> }; >> >> &pcie2x1l1 { >> @@ -660,6 +676,20 @@ &pcie2x1l2 { >> pinctrl-names = "default"; >> pinctrl-0 = <&pcie2_2_rst>; > > The new pinctrl reference is ``pcie_25glan_perstb_pin``. Will also be fixed by rebasing onto linux-next. > >> status = "okay"; >> + >> + pcie@0,0 { >> + reg = <0x400000 0 0 0 0>; >> + #address-cells = <3>; >> + #size-cells = <2>; >> + ranges; >> + device_type = "pci"; >> + bus-range = <0x41 0x4f>; >> + >> + rtl_eth1: ethernet@0,0 { >> + compatible = "pci10ec,8125"; >> + reg = <0x410000 0 0 0 0>; >> + }; > > Described on page 22 of the schematic titled '2.5G Ethernet A' and ``U10`` > (ie RTL8125BG) is connected to LAN1 which has ``ETH1`` as label on the case. > > So this results in: > ETH1 -> rtl_eth1 > ETH2 -> rtl_eth0 > > This sounds like a recipe for confusion and/or potential future mistakes. > I think using ``rtl_eth1`` and ``rtl_eth2`` would be less confusing, but > I'm fine with another construct which achieves a similar thing. Yeah, that will result in aliases `ethernet0 = &rtl_eth1;` and `ethernet1 = &rtl_eth2;`. It could also be `rtl_lan1`/`rtl_lan2`, or as the schematics seems to to use the `_b` suffix, just `rtl_lan` and `rtl_lan_b`, I don't mind. Raise if you do, otherwise I'll send v6 as you suggested. Userspace will be off-by-one vs the printed case labels, thus _some_ confusion will remain, but it's already better than the current enP2p33s0/enP4p65s0. > > Cheers, > Diederik > >> + }; >> }; >> >> &pcie30phy { > Thanks, Ricardo