Re: [PATCH v1 05/11] drm/xe/sysctrl: Add system controller interrupt handler

Raag Jadav
2026-04-22T06:25:08Z

On Wed, Apr 22, 2026 at 11:25:44AM +0530, Tauro, Riana wrote:
> On 4/18/2026 2:46 AM, Raag Jadav wrote:
> > Add system controller interrupt handler which is denoted by 11th bit in
> > GFX master interrupt register. While at it, add worker for scheduling
> > system controller work.
>
> Why do we need this series in the threshold patch. From what i see, we need
> only structures
> Can't we only redefine those here?
>
> I know you will have to rebase again once any patch is merged. But this is
> unnecessary noise
> for the drm patch.

We have threshold crossed event so I thought it was relevant here. We can
merge it independently if you're okay with it.

Raag

> > Co-developed-by: Soham Purkait <soham.purkait@intel.com>
> > Signed-off-by: Soham Purkait <soham.purkait@intel.com>
> > Signed-off-by: Raag Jadav <raag.jadav@intel.com>
> > Reviewed-by: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
> > Reviewed-by: Riana Tauro <riana.tauro@intel.com>
> > ---
> > drivers/gpu/drm/xe/regs/xe_irq_regs.h | 1 +
> > drivers/gpu/drm/xe/xe_irq.c | 2 ++
> > drivers/gpu/drm/xe/xe_sysctrl.c | 35 +++++++++++++++++++++------
> > drivers/gpu/drm/xe/xe_sysctrl.h | 1 +
> > drivers/gpu/drm/xe/xe_sysctrl_types.h | 4 +++
> > 5 files changed, 36 insertions(+), 7 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/xe/regs/xe_irq_regs.h b/drivers/gpu/drm/xe/regs/xe_irq_regs.h
> > index 9d74f454d3ff..1d6b976c4de0 100644
> > --- a/drivers/gpu/drm/xe/regs/xe_irq_regs.h
> > +++ b/drivers/gpu/drm/xe/regs/xe_irq_regs.h
> > @@ -22,6 +22,7 @@
> > #define DISPLAY_IRQ REG_BIT(16)
> > #define SOC_H2DMEMINT_IRQ REG_BIT(13)
> > #define I2C_IRQ REG_BIT(12)
> > +#define SYSCTRL_IRQ REG_BIT(11)
> > #define GT_DW_IRQ(x) REG_BIT(x)
> > /*
> > diff --git a/drivers/gpu/drm/xe/xe_irq.c b/drivers/gpu/drm/xe/xe_irq.c
> > index 9a775c6588dc..e9f0b3cad06d 100644
> > --- a/drivers/gpu/drm/xe/xe_irq.c
> > +++ b/drivers/gpu/drm/xe/xe_irq.c
> > @@ -24,6 +24,7 @@
> > #include "xe_mmio.h"
> > #include "xe_pxp.h"
> > #include "xe_sriov.h"
> > +#include "xe_sysctrl.h"
> > #include "xe_tile.h"
> > /*
> > @@ -525,6 +526,7 @@ static irqreturn_t dg1_irq_handler(int irq, void *arg)
> > xe_heci_csc_irq_handler(xe, master_ctl);
> > xe_display_irq_handler(xe, master_ctl);
> > xe_i2c_irq_handler(xe, master_ctl);
> > + xe_sysctrl_irq_handler(xe, master_ctl);
> > xe_mert_irq_handler(xe, master_ctl);
> > gu_misc_iir = gu_misc_irq_ack(xe, master_ctl);
> > }
> > diff --git a/drivers/gpu/drm/xe/xe_sysctrl.c b/drivers/gpu/drm/xe/xe_sysctrl.c
> > index 2bcef304eb9a..7de3e73bd8e0 100644
> > --- a/drivers/gpu/drm/xe/xe_sysctrl.c
> > +++ b/drivers/gpu/drm/xe/xe_sysctrl.c
> > @@ -8,6 +8,7 @@
> > #include <drm/drm_managed.h>
> > +#include "regs/xe_irq_regs.h"
> > #include "regs/xe_sysctrl_regs.h"
> > #include "xe_device.h"
> > #include "xe_mmio.h"
> > @@ -30,10 +31,16 @@
> > static void sysctrl_fini(void *arg)
> > {
> > struct xe_device *xe = arg;
> > + struct xe_sysctrl *sc = &xe->sc;
> > + disable_work_sync(&sc->work);
> > xe->soc_remapper.set_sysctrl_region(xe, 0);
> > }
> > +static void xe_sysctrl_work(struct work_struct *work)
> > +{
> > +}
> > +
> > /**
> > * xe_sysctrl_init() - Initialize System Controller subsystem
> > * @xe: xe device instance
> > @@ -55,12 +62,6 @@ int xe_sysctrl_init(struct xe_device *xe)
> > if (!xe->info.has_sysctrl)
> > return 0;
> > - xe->soc_remapper.set_sysctrl_region(xe, SYSCTRL_MAILBOX_INDEX);
> > -
> > - ret = devm_add_action_or_reset(xe->drm.dev, sysctrl_fini, xe);
> > - if (ret)
> > - return ret;
> > -
> > sc->mmio = devm_kzalloc(xe->drm.dev, sizeof(*sc->mmio), GFP_KERNEL);
> > if (!sc->mmio)
> > return -ENOMEM;
> > @@ -73,9 +74,29 @@ int xe_sysctrl_init(struct xe_device *xe)
> > if (ret)
> > return ret;
> > + xe->soc_remapper.set_sysctrl_region(xe, SYSCTRL_MAILBOX_INDEX);
> > xe_sysctrl_mailbox_init(sc);
> > + INIT_WORK(&sc->work, xe_sysctrl_work);
> > - return 0;
> > + return devm_add_action_or_reset(xe->drm.dev, sysctrl_fini, xe);
> > +}
> > +
> > +/**
> > + * xe_sysctrl_irq_handler() - Handler for System Controller interrupts
> > + * @xe: xe device instance
> > + * @master_ctl: interrupt register
> > + *
> > + * Handle interrupts generated by System Controller.
> > + */
> > +void xe_sysctrl_irq_handler(struct xe_device *xe, u32 master_ctl)
> > +{
> > + struct xe_sysctrl *sc = &xe->sc;
> > +
> > + if (!xe->info.has_sysctrl || !sc->work.func)
> > + return;
> > +
> > + if (master_ctl & SYSCTRL_IRQ)
> > + schedule_work(&sc->work);
> > }
> > /**
> > diff --git a/drivers/gpu/drm/xe/xe_sysctrl.h b/drivers/gpu/drm/xe/xe_sysctrl.h
> > index f3b0f3716b2f..f7469bfc9324 100644
> > --- a/drivers/gpu/drm/xe/xe_sysctrl.h
> > +++ b/drivers/gpu/drm/xe/xe_sysctrl.h
> > @@ -17,6 +17,7 @@ static inline struct xe_device *sc_to_xe(struct xe_sysctrl *sc)
> > }
> > int xe_sysctrl_init(struct xe_device *xe);
> > +void xe_sysctrl_irq_handler(struct xe_device *xe, u32 master_ctl);
> > void xe_sysctrl_pm_resume(struct xe_device *xe);
> > #endif
> > diff --git a/drivers/gpu/drm/xe/xe_sysctrl_types.h b/drivers/gpu/drm/xe/xe_sysctrl_types.h
> > index 8217f6befe70..5f408d6491ef 100644
> > --- a/drivers/gpu/drm/xe/xe_sysctrl_types.h
> > +++ b/drivers/gpu/drm/xe/xe_sysctrl_types.h
> > @@ -8,6 +8,7 @@
> > #include <linux/mutex.h>
> > #include <linux/types.h>
> > +#include <linux/workqueue_types.h>
> > struct xe_mmio;
> > @@ -27,6 +28,9 @@ struct xe_sysctrl {
> > /** @phase_bit: Message boundary phase toggle bit (0 or 1) */
> > bool phase_bit;
> > +
> > + /** @work: Pending events worker */
> > + struct work_struct work;
> > };
> > #endif